CN100511122C - Solid-state hard disk controller circuit and solid-state hard disk - Google Patents

Solid-state hard disk controller circuit and solid-state hard disk Download PDF

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CN100511122C
CN100511122C CNB2007101761118A CN200710176111A CN100511122C CN 100511122 C CN100511122 C CN 100511122C CN B2007101761118 A CNB2007101761118 A CN B2007101761118A CN 200710176111 A CN200710176111 A CN 200710176111A CN 100511122 C CN100511122 C CN 100511122C
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interface
data
unit
pci
control unit
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CN101140502A (en
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张小平
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to PCT/CN2008/072654 priority patent/WO2009049546A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0661Format or protocol conversion arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • G06F3/0607Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

The present invention relates to a solid state disk controller circuit, which comprises an interface conversion unit connected with a device provided with a PCIE interface through a PCIE interface to complete conversion between PCIE interface data and flash memory interface data or communicated with a device provided with a PCI-X interface through a PCI-X interface to complete conversion between PCI-X interface data and flash memory interface data, a buffer unit connected with the interface conversion unit to buffer data and a controller interface unit to connect with a flash memory and the buffer unit and receive data from the buffer unit or transmit data to the buffer unit. Moreover, the present invention relates to a solid state disk, which comprises an interface connection unit, a controller circuit and a flash memory connected in sequence. The solid state disk controller circuit and the solid state disk using the controller circuit of the present invention improve memory and reading speed of solid state disks.

Description

Solid-state hard disk controller circuit and solid state hard disc
Technical field
The present invention relates to technical field of memory, particularly relate to solid-state hard disk controller circuit and based on the solid state hard disc of above-mentioned controller circuitry.
Background technology
Rapid growth along with data service, the continuous lifting of server performance, per second I/O number of times (the Input/output per second of server, be called for short IOPS) also sustainable growth, and traditional memory device since its based on the characteristic limitations of mechanical hard disk IOPS (also being data read and the speed that writes), therefore traditional memory device based on mechanical hard disk can not be applicable to the server that IOPS is growing.
In the solid state hard disc that is based on flash memory (Flash) (Solid State Disk, be called for short SSD) arise at the historic moment, solid state hard disc is owing to adopted the flash memory storage medium, and flash memory inside does not have physical construction, therefore data search time, time delay and seek time reduce greatly, have improved IOPS.The interface of existing SSD generally adopts ide (Integrated Drive Electronics is called for short IDE) or serial advanced technology attachment feeder apparatus (Serial Advanced Technology Attachment, abbreviate SAT A) interface.In realizing process of the present invention, the inventor finds that there are the following problems at least in the prior art: IDE is owing to adopt parallel bus interface, and therefore storage and reading speed are slow, and therefore the SSD based on ide interface has limitation in the application aspect the server; SATA adopts usually at using separately under PC (PC) environment and designing, rather than at many hard disks environment of service field, therefore only be applicable to the low side basic server, therefore based on a large amount of nonlinear requests of reading of the SSD incompatibility enterprise-level server application program of SATA interface.
Summary of the invention
An aspect of of the present present invention provides a kind of solid-state hard disk controller circuit, makes the solid state hard disc that is connected with this controller circuitry obtain storage and reading speed faster, thereby improves the IOPS of system.
Another aspect of the present invention provides a kind of solid state hard disc, and this solid state hard disc is connected with the equipment that is provided with PCI-X interface or PCIE interface by above-mentioned controller circuitry, to obtain storage and reading speed faster.
For realizing a first aspect of the present invention, among the embodiment of a kind of solid-state hard disk controller circuit of the present invention, comprise: interface conversion unit, be connected with the equipment that is provided with the PCIE interface by the PCIE interface, be used to finish the conversion of PCIE interface data and flash interface data, or be connected with the equipment that is provided with the PCI-X interface by the PCI-X interface, be used to finish the conversion of PCI-X interface data and flash interface data; The control unit interface unit is used for being connected with flash memory, to receive data that described flash memory sends or to transmit data to described flash memory; Buffer cell, be connected with described interface conversion unit and described control unit interface unit, be used for the data that described interface conversion unit transmits are carried out sending to described control unit interface unit after the buffered, the data that described control unit interface unit transmits are carried out sending to described interface conversion unit after the buffered.
Based on the above embodiments of the present invention, this solid-state hard disk controller circuit is realized and being connected of the server, notebook or other computer equipment that are provided with PCI-X interface or PCIE interface by interface conversion unit; By the solid state hard disc that connects and composes of buffer cell and control unit interface unit and flash memory, make the solid state hard disc that is connected with this controller circuitry be connected and to obtain to store faster and reading speed with PCI-X interface or PCIE interface.
For realizing a second aspect of the present invention, among the embodiment of a kind of solid state hard disc of the present invention, comprise the interface linkage unit, controller circuitry and the flash memory that connect successively, wherein, described interface linkage unit is PCIE interface linkage unit or PCI-X interface linkage unit; Described controller circuitry comprises: interface conversion unit, be connected with the equipment that is provided with the PCIE interface by PCIE interface linkage unit, be used to finish the conversion of PCIE interface data and flash interface data, or be connected with the equipment that is provided with the PCI-X interface by PCI-X interface linkage unit, be used to finish the conversion of PCI-X interface data and flash interface data; The control unit interface unit is connected with described flash memory, to receive data that described flash memory sends or to transmit data to described flash memory; Buffer cell, be connected with described interface conversion unit and described control unit interface unit, be used for the data that described interface conversion unit transmits are carried out sending to described control unit interface unit after the buffered, the data that described control unit interface unit transmits are carried out sending to described interface conversion unit after the buffered.
Based on the embodiment of the invention described above solid state hard disc, therefore solid state hard disc can obtain to store faster and reading speed owing to adopt controller circuitry to be connected with the equipment that is provided with PCI-X interface or PCIE interface.
Description of drawings
Fig. 1 is the structural representation of solid-state hard disk controller circuit embodiment one of the present invention;
Fig. 2 is the structural representation of the further refinement of Fig. 1;
Fig. 3 is the structural representation of solid-state hard disk controller circuit embodiment two of the present invention;
Fig. 4 is the structural representation of the further refinement of Fig. 3;
Fig. 5 is the structural representation of solid state hard disc embodiment one of the present invention;
Fig. 6 is the structural representation of solid state hard disc embodiment two of the present invention.
Embodiment
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
The embodiment of solid-state hard disk controller circuit of the present invention comprises: interface conversion unit, be connected with the equipment that is provided with the PCIE interface, be used to finish the conversion of PCIE interface data and flash interface data, or be connected with the equipment that is provided with the PCI-X interface, be used to finish the conversion of PCI-X interface data and flash interface data; The control unit interface unit is used for being connected with flash memory, to receive data that described flash memory sends or to transmit data to described flash memory; Buffer cell, be connected with described interface conversion unit and described control unit interface unit, be used for the data that described interface conversion unit transmits are carried out sending to described control unit interface unit after the buffered, the data that described control unit interface unit transmits are carried out sending to described interface conversion unit after the buffered.
Based on the above embodiments of the present invention, this solid-state hard disk controller circuit is realized and being connected of the server, notebook or other computer equipment that are provided with PCI-X interface or PCIE interface by interface conversion unit; By the solid state hard disc that connects and composes of buffer cell and control unit interface unit and flash memory, make the solid state hard disc that is connected with this controller circuitry be connected and to obtain to store faster and reading speed with PCI-X interface or PCIE interface.
Fig. 1 is the structural representation of solid-state hard disk controller circuit embodiment one of the present invention.Solid-state hard disk controller circuit comprises PCI-X interface conversion unit 210, buffer cell 220 and the control unit interface unit 230 that connects successively respectively.
PCI-X interface conversion unit 210 is connected with the equipment that is provided with the PCI-X interface by the PCI-X interface.Solid state hard disc is connected with the PCI-X interface of server or notebook or other computer equipments by PCI-X interface conversion unit 210.PCI-X interface conversion unit 210 also is used for data are carried out the sequential conversion except being used for the equipment that is provided with the PCI-X interface is connected.When solid state hard disc write data or send data, PCI-X interface conversion unit 210 can be converted to local sequential with the sequential from the data (as data or order etc.) of PCI-X interface by solid-state hard disk controller circuit; By solid-state hard disk controller circuit from solid state hard disc when reading of data or return command, PCI-X interface conversion unit 210 can be converted into the local sequential of data the sequential of PCI-X interface.
Control unit interface unit 230 is connected with flash memory, to receive data that described flash memory sends or to transmit data to described flash memory.
Buffer cell 220, be connected with PCI-X interface conversion unit 210 and control unit interface unit 230, be used for the data that described PCI-X interface conversion unit 210 transmits are carried out sending to control unit interface unit 230 after the buffered, the data that control unit interface unit 230 transmits are carried out sending to PCI-X interface conversion unit 210 after the buffered.Buffer cell 220 can be any storage unit, and relatively the Chang Yong storage unit that is used for metadata cache can be dual port RAM (DPRAM), single port RAM (SPRAM) or FIFO etc.
Fig. 2 is the structural representation of the further refinement of Fig. 1.PCI-X interface conversion unit 210 comprises: bus conversion module 211, the sequential that is used for data that the PCI-X interface is sent are converted into local sequential or the local sequential of data are converted into the sequential of PCI-X interface.
Buffer cell 220 comprises: receive data buffering module 221 and send data buffering module 222.Receive data buffering module 221, be used to receive the data that PCI-X interface conversion unit 210 sends and described data are carried out buffered and be sent to control unit interface unit 230; Send data buffering module 222, be used to receive the data that control unit interface unit 230 sends and described data are carried out buffered and be sent to PCI-X interface conversion unit 210.
This embodiment, solid-state hard disk controller circuit is realized and being connected of the server that is provided with the PCI-X interface, notebook or other computer equipment by PCI-X interface conversion unit 210; The solid state hard disc that connects and composes by buffer cell 220 and control unit interface unit 230 and flash memory makes the solid state hard disc that is connected with this controller circuitry be connected with the PCI-X interface and can obtain to store faster and reading speed.
Fig. 3 is the structural representation of solid-state hard disk controller circuit embodiment two of the present invention.Solid-state hard disk controller circuit comprises PCIE interface conversion unit 310, buffer cell 320 and the control unit interface unit 330 that connects successively respectively.
PCIE interface conversion unit 310 is connected with the equipment that is provided with the PCIE interface by the PCIE interface, is used to finish the conversion of PCIE interface data and flash interface data.Solid state hard disc is connected with the PCIE interface of server or notebook or other computer equipments by PCIE interface conversion unit 310.PCIE interface conversion unit 310 also is used for data are gone here and there and exchanged, unpack/processing of packing with the equipment that is provided with the PCIE interface is connected except being used for.PCIE interface and PCI-X interface are inequality is all to be form transmission with packet by the data that the PCIE interface transmits, and data all parse in packet, is not directly can resolve command or data layout on the sequential.By controller circuitry when solid state hard disc writes data or send data, PCIE interface conversion unit 310 need will from the data of PCIE interface go here and there and change and unpack processing after just can be discerned or be stored by flash memory; By controller circuitry from solid state hard disc when reading of data or return command, PCIE interface conversion unit 310 data need be packed handle and and the string conversion after, just can or read for the identification of PCIE interface.
Control unit interface unit 330 is connected with flash memory, to receive data that described flash memory sends or to transmit data to described flash memory.
Buffer cell 320, be connected with PCIE interface conversion unit 310 and control unit interface unit 330, be used for the data that described PCIE interface conversion unit 310 transmits are carried out sending to control unit interface unit 330 after the buffered, the data that control unit interface unit 330 transmits are carried out sending to PCIE interface conversion unit 310 after the buffered.Buffer cell 320 can be any storage unit, and relatively the Chang Yong storage unit that is used for metadata cache can be dual port RAM (DPRAM), single port RAM (SPRAM) or FIFO etc.
Fig. 4 is the structural representation of the further refinement of Fig. 3.PCIE (PCI Express is called for short PCIE) interface conversion unit 310 comprises string and modular converter 311, separates packet handing module 312, packing processing module 313 and parallel serial conversion module 314.
String and modular converter 311 are used for the data that sent by the PCIE interface are carried out serial-to-parallel conversion; Separate packet handing module 312, be connected, send to buffer cell 320 after being used for the data that string and modular converter 311 transmit are unpacked processing with described string and modular converter 311; Packing processing module 313 is used for the data that buffer cell 320 the transmits processing of packing; Parallel serial conversion module 314 is connected with described packing processing module 313, is used for the data that described packing processing module 313 transmits are carried out sending to described PCIE interface after the parallel-to-serial conversion.
Buffer cell 320 comprises: receive data buffering module 321 and send data buffering module 322.Receive data buffering module 321, be used to receive the data that PCIE interface conversion unit 310 sends and described data are carried out buffered and be sent to control unit interface unit 330; Send data buffering module 322, be used to receive the data that control unit interface unit 330 sends and described data are carried out buffered and be sent to PCIE interface conversion unit 310.
This embodiment, solid-state hard disk controller circuit is realized and being connected of the server that is provided with the PCIE interface, notebook or other computer equipment by PCIE interface conversion unit 310; The solid state hard disc that connects and composes by buffer cell 320 and control unit interface unit 330 and flash memory, make the solid state hard disc that is connected with this controller circuitry be connected with the PCIE interface, can obtain to store faster and reading speed, and because present most of main flow notebook all is equipped with the PCIE interface, therefore make that the solid state hard disc that is connected with this controller circuitry is more general in the sector application of main flow notebook, simultaneously because the available bandwidth of PCIE interface is higher, therefore make the solid state hard disc that is connected with this controller circuitry obtain higher bandwidth, be adapted to enterprise-level server.
Solid-state hard disk controller circuit described in the foregoing description, control unit interface unit can comprise one or more control unit interface link blocks, and each control unit interface link block is used to connect one or more flash memories.
Fig. 5 comprises PCI-X interface linkage unit 500a, controller circuitry 100a and the some flash memory 400a that connects successively for the structural representation of solid state hard disc embodiment one of the present invention, described solid state hard disc.
Among this embodiment, controller circuitry 100a comprises: the PCI-X interface conversion unit 210 of Lian Jieing, buffer cell 220 and control unit interface unit 230 successively.
PCI-X interface conversion unit 210,500a is connected with the equipment that is provided with the PCI-X interface by PCI-X interface linkage unit;
Control unit interface unit 230,400a is connected with flash memory, transmits data with the data of reception flash memory 400a transmission or to flash memory 400a.Control unit interface unit 230 comprises one or more control unit interface link blocks 231, and each control unit interface link block 231 connects one or more flash memory 400a.When controller circuitry 100a is connected with the PCI-X interface that high band wide data is provided, just can realize flexibly the data of a plurality of flash memories concurrent and with each control unit interface link block in water operation between a plurality of flash memories of being connected, so just can more effectively improve the bandwidth of solid state hard disc.
Flash memory 400a can be Sheffer stroke gate (Not-AND Gate is called for short NAND) type flash memory, also can be rejection gate (Not-OR Gate is called for short NOR) type flash memory.Choosing according to anti-in the type of flash memory of control unit interface unit 230 if flash memory 400a is a NAND type flash memory, then selects to support the control unit interface unit of NAND type flash memory; If flash memory 400a is a NOR type flash memory, then select to support the control unit interface unit of NOR type flash memory; If flash memory 400a has NAND type flash memory, NOR type flash memory is also arranged, then select to support simultaneously the control unit interface unit of NAND type flash memory and NOR type flash memory.
Solid state hard disc in the present embodiment adopts flash memory (being FLASH) as storage medium, owing to do not have physical construction in the flash memory, therefore compares data search time, time delay and seek time with mechanical hard disk and reduces greatly, thereby improved IOPS.Form/sequential conversion of interaction data between the PCI-X interface of the interface conversion unit realization of the solid state hard disc among this embodiment by controller circuitry and server or notebook or other computer equipments etc., and the buffer cell by controller circuitry is realized the buffered of data, makes the solid state hard disc that is connected with this controller circuitry to carry out quick storage or read data.And flash memory and controller circuitry are integrated in one, have reduced the instability that is connected between controller circuitry and the flash memory, make the solid state hard disc stable performance, be convenient to plug and carry.
Fig. 6 comprises PCIE interface linkage unit 500b, controller circuitry 100b and the some flash memory 400b that connects successively for the structural representation of solid state hard disc embodiment two of the present invention, described solid state hard disc.
Among this embodiment, controller circuitry 100b comprises: the PCIE interface conversion unit 310 of Lian Jieing, buffer cell 320 and control unit interface unit 330 successively.
PCIE interface conversion unit 310,500b is connected with the equipment that is provided with the PCIE interface by PCIE interface linkage unit.
Control unit interface unit 330,400b is connected with flash memory, transmits data with the data of reception flash memory 400b transmission or to flash memory 400b.Control unit interface unit 330 comprises one or more control unit interface link blocks 331, and each control unit interface link block 331 connects one or more flash memory 400b.When controller circuitry 100b is connected with the PCIE interface that high band wide data is provided, just can realize flexibly the data of a plurality of flash memories concurrent and with each control unit interface link block in water operation between a plurality of flash memories of being connected, so just can more effectively improve the bandwidth of solid state hard disc.
Because the bandwidth of PCIE is higher, when comprising a plurality of controllers, each control unit interface unit, solid state hard disc comprises at least one control unit interface link block, when each control unit interface link block can connect at least one flash memory, just can realize flexibly the data of a plurality of flash memories concurrent and with each controller link block in water operation between a plurality of flash memories of being connected, so just can more effectively improve the bandwidth of solid state hard disc.For example when the flash memory in the solid state hard disc adopts NAND FLASH chip, because the time-delay of NANDFlash visit data is delicate for foreseeable more than 20, can reach IOPS up to ten thousand, so the solid state hard disc that connects NAND FLASH chip often provides very high data bandwidth to the enterprise-level server that the storage data are carried out read operation for needs.Simultaneously, can also conveniently change the bandwidth of solid state hard disc like this, as the upgrading of solid state hard disc, dilatation, adjustment bandwidth etc. because the connection number of flash memory can change.
Controller circuitry in the foregoing description and flash memory can be integrated morphology, also can be separate structure, can also for the integrated structure of PCIE/PCI-X interface of server or notebook or other computer equipments.Each module can adopt field programmable gate array (Field ProgrammableGate Array in the controller circuitry, abbreviation FPGA) technology designs, also can be by change PCI-X bridge and the realization of FPGA circuit in conjunction with PCIE, can also adopt customization custom layout (Application SpecificIntegrated Circuit, be called for short ASIC) special chip realization circuit, or adopt other processors to realize in conjunction with peripheral circuit.
It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.

Claims (10)

1, a kind of solid-state hard disk controller circuit comprises:
Interface conversion unit, be connected with the equipment that is provided with the PCIE interface by the PCIE interface, be used to finish the conversion of PCIE interface data and flash interface data, or be connected with the equipment that is provided with the PCI-X interface, be used to finish the conversion of PCI-X interface data and flash interface data by the PCI-X interface;
The control unit interface unit is used for being connected with flash memory, to receive data that described flash memory sends or to transmit data to described flash memory;
Buffer cell, be connected with described interface conversion unit and described control unit interface unit, be used for the data that described interface conversion unit transmits are carried out sending to described control unit interface unit after the buffered, the data that described control unit interface unit transmits are carried out sending to described interface conversion unit after the buffered.
2, controller circuitry according to claim 1, it is characterized in that, described interface conversion unit is the PCI-X interface conversion unit, is connected with the equipment that is provided with the PCI-X interface by the PCI-X interface, is used to finish the conversion of PCI-X interface data and flash interface data.
3, controller circuitry according to claim 2, it is characterized in that, described PCI-X interface conversion unit comprises: bus conversion module, the sequential that is used for data that the PCI-X interface is sent are converted into local sequential or the local sequential of data are converted into the sequential of PCI-X interface.
4, controller circuitry according to claim 1 is characterized in that, described interface conversion unit is the PCIE interface conversion unit, is connected with the equipment that is provided with the PCIE interface by the PCIE interface, is used to finish the conversion of PCIE interface data and flash interface data.
5, controller circuitry according to claim 4 is characterized in that, described PCIE interface conversion unit comprises:
String and modular converter are used for the data that sent by the PCIE interface are carried out serial-to-parallel conversion;
Separate packet handing module, be connected, send to described buffer cell after being used for the data that described string and modular converter transmit are unpacked processing with described string and modular converter;
The packing processing module is used for the data that described buffer cell the transmits processing of packing;
Parallel serial conversion module is connected with described packing processing module, is used for the data that described packing processing module transmits are carried out sending to described PCIE interface after the parallel-to-serial conversion.
6, controller circuitry according to claim 1 is characterized in that, described buffer cell comprises:
Receive the data buffering module, be used for the data of receiving interface converting unit transmission and described data are carried out buffered being sent to the control unit interface unit;
Send the data buffering module, be used to receive the data that the control unit interface unit sends and described data are carried out buffered and be sent to interface conversion unit.
According to each described controller circuitry among the claim 1-6, it is characterized in that 7, described control unit interface unit comprises one or more control unit interface link blocks, each control unit interface link block is used to connect one or more flash memories.
8, a kind of solid state hard disc comprises the interface linkage unit, controller circuitry and the flash memory that connect successively, it is characterized in that,
Described interface linkage unit is PCIE interface linkage unit or PCI-X interface linkage unit;
Described controller circuitry comprises:
Interface conversion unit, be connected with the equipment that is provided with the PCIE interface by PCIE interface linkage unit, be used to finish the conversion of PCIE interface data and flash interface data, or be connected with the equipment that is provided with the PCI-X interface by PCI-X interface linkage unit, be used to finish the conversion of PCI-X interface data and flash interface data;
The control unit interface unit is connected with described flash memory, to receive data that described flash memory sends or to transmit data to described flash memory;
Buffer cell, be connected with described interface conversion unit and described control unit interface unit, be used for the data that described interface conversion unit transmits are carried out sending to described control unit interface unit after the buffered, the data that described control unit interface unit transmits are carried out sending to described interface conversion unit after the buffered.
9, solid state hard disc according to claim 8 is characterized in that, described buffer cell comprises:
Receive the data buffering module, be used for the data of receiving interface converting unit transmission and described data are carried out buffered being sent to the control unit interface unit;
Send the data buffering module, be used to receive the data that the control unit interface unit sends and described data are carried out buffered and be sent to interface conversion unit.
10, according to Claim 8 or 9 described solid state hard discs, it is characterized in that described control unit interface unit comprises one or more control unit interface link blocks, each control unit interface link block connects one or more flash memories.
CNB2007101761118A 2007-10-19 2007-10-19 Solid-state hard disk controller circuit and solid-state hard disk Active CN100511122C (en)

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PCT/CN2008/072654 WO2009049546A1 (en) 2007-10-19 2008-10-10 Solid-state hard disk controller circuit and solid-state hard disk

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Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100511122C (en) * 2007-10-19 2009-07-08 华为技术有限公司 Solid-state hard disk controller circuit and solid-state hard disk
CN101442548B (en) * 2008-12-17 2012-09-05 成都市华为赛门铁克科技有限公司 Solid-state hard disk and operation method thereof
CN101650639B (en) * 2009-09-11 2012-01-04 成都市华为赛门铁克科技有限公司 Storage device and computer system
CN102129881A (en) * 2010-01-15 2011-07-20 多利吉科技股份有限公司 Solid-state storage disc device and system suitable for peripheral component interconnect express interface
CN102073459B (en) * 2010-11-02 2013-04-17 记忆科技(深圳)有限公司 Computer system based on solid state drive and solid state drive
CN102096560A (en) * 2011-01-27 2011-06-15 浪潮电子信息产业股份有限公司 Multi-path solid state disk acceleration method based on PCI-E interface
US8635407B2 (en) 2011-09-30 2014-01-21 International Business Machines Corporation Direct memory address for solid-state drives
CN102693096B (en) * 2012-05-17 2014-03-26 山西达鑫核科技有限公司 Bit-based serial transmission cloud storage method and device
CN102929813B (en) * 2012-10-19 2016-06-01 浪潮电子信息产业股份有限公司 The method of design of a kind of PCI-E interface solid-state hard disk controller
CN104951237B (en) * 2014-03-24 2018-04-27 北京强度环境研究所 High-speed storage device based on SATA interface solid state hard disc
US9348518B2 (en) 2014-07-02 2016-05-24 International Business Machines Corporation Buffered automated flash controller connected directly to processor memory bus
US9542284B2 (en) 2014-08-06 2017-01-10 International Business Machines Corporation Buffered automated flash controller connected directly to processor memory bus
CN105573929A (en) * 2014-10-14 2016-05-11 中兴通讯股份有限公司 Controller module of solid state disk
CN105677239A (en) * 2015-12-30 2016-06-15 中航网信(北京)科技有限公司 Data storing method, apparatus and server
CN109427402A (en) * 2017-08-23 2019-03-05 西安莫贝克半导体科技有限公司 Solid state hard disk
CN109165177A (en) * 2018-09-21 2019-01-08 郑州云海信息技术有限公司 A kind of communication means and relevant apparatus of PCIE interface
CN115033509A (en) * 2022-06-30 2022-09-09 上海领存信息技术有限公司 Disk array management device, disk array system and server

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7099107B2 (en) * 2004-07-08 2006-08-29 Matsushita Electric Industrial Co., Ltd. Systems and methods for two-step self-servowriting using per-head final pattern writing
CN1889065A (en) * 2005-06-28 2007-01-03 群联电子股份有限公司 Flash storing memory with high-speed peripheral parts inter connecting bus
US7730256B2 (en) * 2005-08-22 2010-06-01 Broadcom Corporation Dual work queue disk drive controller
CN1794141A (en) * 2005-12-22 2006-06-28 苏州超锐微电子有限公司 Manufacturing method of PCI Express data collection card
CN100353307C (en) * 2006-02-16 2007-12-05 杭州华三通信技术有限公司 Storage system and method of storaging data and method of reading data
CN201048049Y (en) * 2007-05-30 2008-04-16 徐欣 Electronic hard disk of PCIe interface
CN100511122C (en) * 2007-10-19 2009-07-08 华为技术有限公司 Solid-state hard disk controller circuit and solid-state hard disk

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