CN100499070C - Making method for dual enchasing structure - Google Patents
Making method for dual enchasing structure Download PDFInfo
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- CN100499070C CN100499070C CNB2006100300196A CN200610030019A CN100499070C CN 100499070 C CN100499070 C CN 100499070C CN B2006100300196 A CNB2006100300196 A CN B2006100300196A CN 200610030019 A CN200610030019 A CN 200610030019A CN 100499070 C CN100499070 C CN 100499070C
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Abstract
A method for manufacturing double mosaic structure first provides a wafer which forms groove and contact holes. The wafer comprises sequentially from the bottom a lead layer, a covering layer, an insulating layer, an isolating layer, a sacrificing layer, an anti-reflection layer and an optical resistance layer. The groove is positioned in the insulating layer and in all the film layers above the insulating layer. The contact holes are positioned in the insulating layer and are communicated with the groove and the surface of the covering layer. The optical resistance layer and the sacrificing layer below the anti-reflection layer are removed to make the anti-reflection layer sink. The anti-reflection layer is incinerated to make the anti-reflection layer peeled. Through the follow-up intraconnection process, the double mosaic structure is formed. After the above steps, the sacrificing layer and the anti-reflection layer are completely removed, without any residue.
Description
Technical field
The present invention relates to the manufacture method of dual-damascene structure, particularly in dual damascene manufacturing process, remove the method for anti-reflecting layer and sacrifice layer.
Background technology
In recent years, along with the development of semiconductor integrated circuit manufacturing technology, the quantity of contained element constantly increases in the integrated circuit, and size of component is also constantly dwindled because of the lifting of integrated level, the width of line is also more and more narrow, and is therefore also increasing for the demand of good circuit connection.Simultaneously, because dual-damascene structure can avoid the restriction that overlaps error and solve known metal procedure, double-insert process just to be widely used in the semiconductor fabrication process and the lift elements reliability.Therefore, double-insert process has become the main flow of plain conductor connecting technology now.
Existing method of making dual-damascene structure shown in Figure 1A, at first, forms copper conductor layer 2 on substrate 1 surface, at copper conductor layer 2 surface deposition one deck cover layers 3; Then, form an insulating barrier 4 in cover layer 3 surfaces, at insulating barrier 4 surface deposition one deck separators 5; Then, on separator 5, form first anti-reflection layer 6; On formation first photoresist layer 8, the first photoresist layers 8 contact hole pattern is being arranged on first anti-reflection layer 6; With first photoresist layer 8 as etching mask, optionally continuously etching first anti-reflection layer 6, separator 5 and insulating barrier 4, thus form contact hole 9.
Shown in Figure 1B, remove first photoresist layer 8 and first anti-reflection layer 6 with plasma ashing; Then, at separator 5 surface depositions one sacrifice layer 10, and sacrifice layer 10 filled up contact hole 9; Make sacrifice layer 10 surfaces flatten smooth after, forming on second photoresist layer, 12, the second photoresist layers 12 on sacrifice layer 10 surface has channel patterns; Then, second photoresist layer 12 as etching mask, by optionally continuously etch sacrificial layer 10, separator 5 and insulating barrier 4, is formed groove 14.
Shown in Fig. 1 C, remove second photoresist layer 12 and sacrifice layer 10 with organic stripper,
Then, through follow-up intraconnections processing procedure, form dual-damascene structure.
The concrete method of dual-damascene structure such as the disclosed technical scheme of invention that application number is CN03102657 of making.
In existing dual-damascene structure manufacturing process, below photoresistance when forming groove, have only sacrifice layer to play the antireflection effect, and sacrifice layer prevent that the effect that photoresistance is poisoned from not being fine when exposure, causes photoresistance residual easily.
In order to improve the residual problem of photoresistance, prior art adopts when forming groove and deposits an anti-reflection layer in sacrificial layer surface.Yet, in removing sacrifice layer and anti-reflection layer process, there is new problem to occur again, in existing dual-damascene structure manufacturing process, remove anti-reflection layer and sacrifice layer with organic stripper usually.Though, can well remove sacrifice layer with organic stripper, can't peel off anti-reflection layer fully.Shown in Fig. 2 A to 2B, behind organic stripper wet etching anti-reflection layer and sacrifice layer,, there is the anti-reflection layer that does not divest residual by sem observation dual-damascene structure surface.Fig. 2 A is the situation of scanning electron microscopy observed dual-damascene structure remained on surface anti-reflection layer when multiplication factor is 150,000 times.Fig. 2 B is the situation of scanning electron microscopy observed dual-damascene structure remained on surface anti-reflection layer when multiplication factor is 30,000 times.
In the existing dual-damascene structure manufacturing process, the another kind of method of peeling off anti-reflection layer and sacrifice layer is first ashing anti-reflection layer, and then removes sacrifice layer with organic stripper wet etching.Shown in Fig. 3 A to 3B, in ashing anti-reflection layer process,, the oxygen gas plasma ashing produces the phenomenon of crosslinked and multiviscosisty owing to causing the sacrifice layer below the anti-reflection layer, and make follow-up wet etching still can't remove sacrifice layer.Fig. 3 A is the situation of scanning electron microscopy observed dual-damascene structure remained on surface sacrifice layer when multiplication factor is 150,000 times.Fig. 3 B is the situation at scanning electron microscopy observed dual-damascene structure remained on surface sacrifice layer when multiplication factor is 30,000 times.
Existing removing in the process of anti-reflection layer and sacrifice layer owing to directly use organic stripper can't remove anti-reflection layer and sacrifice layer simultaneously, causes anti-reflection layer residual.And, can influence the sacrifice layer below the anti-reflection layer earlier with oxygen gas plasma ashing anti-reflection layer, and cause the crosslinked and multiviscosisty of sacrifice layer, and sacrifice layer can't be removed fully, still have residual.
Summary of the invention
The problem that the present invention solves provides a kind of manufacture method of dual-damascene structure, prevents to cause anti-reflection layer residual owing to directly use organic stripper can't remove anti-reflection layer and sacrifice layer simultaneously; And, then can influence following sacrifice layer earlier with oxygen gas plasma ashing anti-reflection layer, cause the crosslinked and multiviscosisty of sacrifice layer, and sacrifice layer can't be removed.
For addressing the above problem, the invention provides a kind of manufacture method of dual-damascene structure, the wafer that has formed groove and contact hole at first is provided, upwards comprises conductor layer, cover layer, insulating barrier, separator, sacrifice layer, anti-reflection layer and photoresist layer on the described wafer successively; Groove is arranged in insulating barrier and all retes of insulating barrier top, and contact hole is arranged in insulating barrier, and is communicated with groove and cover surface; It is characterized in that, also comprise the following steps: to remove simultaneously the sacrifice layer below photoresist layer and the anti-reflection layer, anti-reflection layer is sunk; The ashing anti-reflection layer is peeled off anti-reflection layer; Through follow-up intraconnections processing procedure, form dual-damascene structure.
Adopt etching method to remove photoresist layer and sacrifice layer simultaneously, etching method is a wet etching, and etchant is CLK888.The material of sacrifice layer is DUO, and the thickness of sacrifice layer is 1700 dust to 2500 dusts, and the thickness of photoresist layer is 4000 dust to 4500 dusts.
The temperature of ashing anti-reflection layer is 20 ℃ to 30 ℃.
The material of anti-reflection layer is an organic BARC, and thickness is 200 dust to 300 dusts, and the ashing time is 10 seconds to 15 seconds.
Anti-reflection layer sinks down into the sacrifice layer position that removes, and joins with separator.
The step of described follow-up intraconnections processing procedure is: after photoresist layer, anti-reflection layer and sacrifice layer were removed, the etching coverlay exposed until conductor layer; Plated copper film is imbedded in contact hole and the groove; The planarization plated copper film, and remove separator.
Compared with prior art, the present invention has the following advantages: earlier remove photoresist layer and sacrifice layer with wet etching, because etchant can't remove anti-reflection layer, so the complete reservation of anti-reflection layer and sink down into the sacrifice layer position that has removed, join with separator; And then the ashing anti-reflection layer, because sacrifice layer is removed, therefore also can not be subjected to the influence of oxygen gas plasma ashing.Last sacrifice layer and anti-reflection layer can be removed fully, without any residual.
Description of drawings
Figure 1A to Fig. 1 C is that prior art forms the dual-damascene structure schematic diagram.
Fig. 2 A to Fig. 2 B is the schematic diagram of prior art residual anti-reflection layer when removing anti-reflection layer and sacrifice layer.
Fig. 3 A to Fig. 3 B is the schematic diagram of prior art residual sacrifice layer when removing anti-reflection layer and sacrifice layer.
Fig. 4 A to Fig. 4 C is that the present invention forms the schematic diagram that removes anti-reflection layer and sacrifice layer in the dual-damascene structure process.
Fig. 5 A to Fig. 5 G is the formation dual-damascene structure schematic diagram of the embodiment of the invention one.
Fig. 6 A to Fig. 6 E is the formation dual-damascene structure schematic diagram of the embodiment of the invention two.
Fig. 7 A to Fig. 7 C is after the present invention removes anti-reflection layer and sacrifice layer, observes dual-damascene structure surface condition schematic diagram under different enlargement ratios.
Fig. 8 A to Fig. 8 C is after the present invention removes anti-reflection layer and sacrifice layer, the schematic diagram at dual-damascene structure central authorities and edge.
Embodiment
Fast development along with the integrated circuit manufacturing, the back segment manufacturing enters deep-sub-micrometer element field, the back segment manufacturing more and more comes into one's own, and much more more and more back segment has integrated the dual damascene intraconnections technology of the inlaying inner connecting line that to contain the contact hole embolism to carry out advanced metal interconnecting joint operation.Because dual-damascene structure can be avoided the restriction that overlaps error and solve known metal procedure, so double-insert process just is applied in the semiconductor fabrication process and the lift elements reliability by factory generally.
If in the manufacturing process of dual-damascene structure, produce residual phenomena when removing rete, will directly influence the quality of dual-damascene structure.Therefore the present invention all peels off anti-reflection layer and sacrifice layer, without any residual by improving the method that removes rete in the dual-damascene structure manufacturing process.For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
Fig. 4 A to Fig. 4 C is that the present invention forms the schematic diagram that removes anti-reflection layer and sacrifice layer in the dual-damascene structure process.Shown in Fig. 4 A, the wafer that has formed groove 34 and contact hole 32 at first is provided, upwards comprise conductor layer 21, cover layer 22, insulating barrier 24, separator 26, sacrifice layer 28, anti-reflection layer 30 and photoresist layer 31 on the described wafer successively; Groove 34 is arranged in insulating barrier 24 and all retes of insulating barrier top, and contact hole 32 is arranged in insulating barrier 24, and is communicated with groove 34 and cover layer 22 surfaces.
Shown in Fig. 4 B, remove the sacrifice layer below photoresist layer 31 and the anti-reflection layer 30, anti-reflection layer 30 is sunk.
Shown in Fig. 4 C, ashing anti-reflection layer 30 is peeled off anti-reflection layer 30.
Through follow-up intraconnections processing procedure, form dual-damascene structure as Fig. 4 D.
The step of described formation groove and contact hole structure forms cover layer for conductor layer is provided on this conductor layer, and on cover layer, forming insulating barrier, layer deposited isolating on insulating barrier; On separator, form first anti-reflection layer, and on first anti-reflection layer, deposit first photoresist layer; Forming pattern on first photoresist layer, after developing, is mask with first photoresistance, and etching first reflector, separator, insulating barrier form contact hole; Remove first photoresist layer and first reflector; In insulation surface and contact hole, form sacrifice layer, and sacrifice layer is filled up contact hole; Sacrifice layer through after the planarization, is deposited second anti-reflection layer on sacrifice layer, and in the second anti-reflection layer surface deposition, second photoresist layer; Forming pattern on second photoresist layer, after developing, is mask with second photoresistance, and etching second anti-reflection layer, sacrifice layer, separator and insulating barrier form groove.
In the present embodiment, step about follow-up intraconnections processing procedure is: after photoresist layer, anti-reflection layer and sacrifice layer are removed, expose until conductor layer by etching method etching coverlay, exposed a part of conductor layer, plated copper film is imbedded in contact hole and the groove through cleaning; Afterwards, make the plated copper film planarization, and remove separator by chemico-mechanical polishing.Thus, the dual-damascene structure of formation and conductor layer electrical connection.
In the present embodiment, photoresist layer and sacrifice layer are carried out wet etching, because sacrifice layer is below anti-reflection layer with CLK888, after removing sacrifice layer, anti-reflection layer can sink down into former sacrifice layer position, joins with following film surface, and present embodiment and following insulation surface are joined.
Present embodiment, the material that sacrifice layer adopts is DUO, and thickness is 1700 dust to 2500 dusts, and present embodiment is preferably 2500 dusts, in addition can be according to also optional 1700 dusts of the material thickness of sacrifice layer, 2000 Egyptian 2300 dusts.The thickness of photoresist layer is 4000 dust to 4500 dusts, and present embodiment is preferably 4150 dusts, in addition can be according to material and optional 4000 dusts of characteristic thickness, 4250 dusts or 4500 dusts of photoresist layer.
In the present embodiment, because etchant CLK888 can't remove anti-reflection layer, therefore complete reservation of anti-reflection layer and sinking and following film surface join, with oxygen gas plasma anti-reflection layer is carried out ashing, wherein, the temperature of ashing is 20 ℃ to 30 ℃, specifically can be 20 ℃, 22 ℃, 25 ℃, 28 ℃ and 30 ℃, and best ashing temperature is 25 ℃ among the embodiment.The time of ashing anti-reflection layer is 10 seconds to 15 seconds, and the preferred time is 10 seconds.Wherein, the ashing time is relevant with the thickness of anti-reflection layer, and the material of anti-reflection layer is an organic BARC, and thickness is 200 dust to 300 dusts, specifically can be 200 dusts, 230 dusts, 250 dusts, 280 dusts or 300 dusts.
In the present embodiment, the material of conductor layer is a copper, can also be aluminium beyond the copper removal.
Fig. 5 A to Fig. 5 G is the formation dual-damascene structure schematic diagram of the embodiment of the invention one.Shown in Fig. 5 A, at first, form 51 layers of copper conductors in substrate 50 surfaces on, on copper conductor layer 51, form a cover layer 52 afterwards: then, on cover layer 52, form an insulating barrier 54, insulating barrier 54 surface deposition one deck separators 55; On separator 55, form first anti-reflection layer 56; Deposition first photoresist layer 58 on first reflector 56.
In the present embodiment, strengthen chemical deposition (PECVD) by the electricity slurry and form cover layer 52, in order to avoid copper conductor layer 51 to be exposed in the oxygen or in other aggressive chemistry processing procedure, the material of cover layer 52 is silicides, wherein, can be materials such as silicon nitride, fire sand, carborundum or nitrogen silicon oxide carbide.
The material of insulating barrier 54 is silicides, the preferred silicon oxide carbide of present embodiment.
The material of separator 55 is tetraethoxysilane (TEOS), and this implements preferred silica.
The material of first anti-reflection layer 56 is BARC.
Shown in Fig. 5 B, on first photoresist layer 58 contact hole pattern is arranged, after the development, as etching mask, optionally continuous etching first anti-reflection layer 56, separator 55 and insulating barrier 54 expose until cover layer 52, form contact hole 59 with first photoresist layer 58.
Among the embodiment, as etching mask, optionally dry etching is removed first anti-reflection layer 56 and insulating barrier 54 continuously with first photoresist layer 58.
Shown in Fig. 5 C, remove first photoresist layer 58 and first anti-reflection layer 56 with plasma ashing.Then, at separator 55 surface deposition sacrifice layers 60, and sacrifice layer 60 filled up contact hole 59; Make sacrifice layer 60 surfaces flatten smooth after, form second anti-reflection layers 62 on sacrifice layer 60 surface; Second photoresist layer 63 is deposited on second anti-reflection layer, 62 surfaces, on second photoresist layer 63, channel patterns is arranged.
In the present embodiment, the material of sacrifice layer 60 is DUO, and the material of second anti-reflection layer 62 is an organic BARC.
Shown in Fig. 5 D, through developing, with second photoresist layer 63 as etching mask, by optionally etching second anti-reflection layer 62, sacrifice layer 60, separator 55 and insulating barrier 54 continuously.
In the present embodiment. as etching mask, optionally dry etching is removed second anti-reflection layer 62, sacrifice layer 60, separator 55 and insulating barrier 54 continuously with second photoresist layer 63.
Shown in Fig. 5 E, the employing wet etching removes the sacrifice layer 60 and second photoresist layer 63 below second anti-reflection layer 62 simultaneously.Because etchant CLK888 do not react with second anti-reflection layer 62, therefore second anti-reflection layer 62 is stayed and sinks down into separator 55 surfaces by complete.
Shown in Fig. 5 F, ashing second anti-reflection layer 62 Removes All second anti-reflection layer 62.
In the present embodiment, the temperature range of ashing second anti-reflection layer is 20 ℃ to 30 ℃, and preferable ashing temperature is 25 ℃.
Shown in Fig. 5 G, expose until copper conductor layer 51 by etching method etching coverlay 52, exposed a part of copper conductor layer 51 through cleaning, plated copper film 66 is imbedded in contact hole 59 and the groove 64; Afterwards, make the plated copper film planarization, and remove separator 55 by chemico-mechanical polishing.Thus, the dual-damascene structure of formation and copper conductor layer 51 electrical connections.
Fig. 6 A to Fig. 6 D is the formation dual-damascene structure schematic diagram of the embodiment of the invention two.As shown in Figure 6A, at first, form copper conductor layer 71 on substrate surface, deposition one deck cover layer 72; Then, form an insulating barrier 74 in cover layer 72 surfaces, at insulating barrier 74 surface deposition one deck separators 76; Then, on separator 76, form first anti-reflection layer 78; Form first photoresist layer 79 on first anti-reflection layer 78, on first photoresist layer 79 groove figure is arranged, through developing, with first photoresist layer 79 as etching mask, optionally continuous dry etching first anti-reflection layer 78, separator 76 and insulating barrier 74 tops, thus groove 80 formed.
Shown in Fig. 6 B, remove first photoresist layer 79 and first anti-reflection layer 78 with plasma ashing; Then, at separator 76 surface depositions one sacrifice layer 82, and sacrifice layer 82 filled up groove 80; Make sacrifice layer 82 surfaces flatten smooth after, form second anti-reflection layers 84 on sacrifice layer 82 surface; Deposit second photoresist layer 81 on second anti-reflection layer, 84 surfaces, on second photoresist layer 81, contact hole graph is arranged; Then, through after developing, second photoresist layer 81 as etching mask, by optionally dry ecthing second anti-reflection layer 84, sacrifice layer 82 and insulating barrier 74 continuously, is formed contact hole 86.
Shown in Fig. 6 C, adopt etchant CLK888 that the sacrifice layer 82 below second photoresist layer 81 and the anti-reflection layer is carried out wet etching, remove the sacrifice layer 82 below second photoresist layer 81 and the anti-reflection layer; Because etchant CLK888 do not react with second anti-reflection layer 83, therefore second anti-reflection layer 83 is complete stays and sinks down into the position of former sacrifice layer 82 and join with separator 76 surfaces.
Shown in Fig. 6 D, with oxygen gas plasma when temperature is 20 ℃ to 30 ℃, ashing anti-reflection layer 83, through 10 to 15 seconds times be that 200 dust to 300 dusts Remove All anti-reflection layer 83 with thickness.
Shown in Fig. 6 E, expose until copper conductor layer 71 by etching method etching coverlay 72, exposed a part of copper conductor layer 71 through cleaning, plated copper film 88 is imbedded in contact hole 86 and the groove 80; Afterwards, make the plated copper film planarization, and remove separator 76 by chemico-mechanical polishing.Thus, the dual-damascene structure of formation and copper conductor layer 71 electrical connections.
Fig. 7 A to Fig. 7 C is after the present invention removes anti-reflection layer and sacrifice layer, observed film surface situation schematic diagram under different enlargement ratios.With photoresist layer as etching mask, by optionally continuously forming contact hole behind the dry ecthing stratified film; With CLK888 photoresist layer and sacrifice layer are carried out wet etching then, remove the sacrifice layer below photoresist layer and the anti-reflection layer; Anti-reflection layer sinks down into the position that removes sacrifice layer, is connected with following rete; Then, remove anti-reflection layer with oxygen gas plasma ashing anti-reflection layer when temperature is 20 ℃ to 30 ℃.
Shown in Fig. 7 A, when the multiplication factor of scanning electron microscopy is 30,000 times, the dual-damascene structure that removes behind photoresist layer, sacrifice layer and the anti-reflection layer is observed, find that wiring figure is high-visible, the surface is without any residue.
Shown in Fig. 7 B, when the multiplication factor of scanning electron microscopy is adjusted to 150,000 times, the dual-damascene structure that removes behind photoresist layer, sacrifice layer and the anti-reflection layer to be observed, copper cash central authorities and edge-smoothing do not have unnecessary material residual.
Shown in Fig. 7 C, when the multiplication factor of scanning electron microscopy is 150,000 times, the dual-damascene structure that removes behind sacrifice layer and the anti-reflection layer is observed, the critical dimension of its device is different from the dual-damascene structure device of Fig. 7 B, finds that the copper cash edge is without any because the residual coarse figure that causes of material.
Fig. 7 A to Fig. 7 C, the device on used observation dual-damascene structure surface is a KLA CD scanning electron microscopy.
Fig. 8 A to Fig. 8 C is after the present invention removes anti-reflection layer and sacrifice layer, the schematic diagram at dual-damascene structure central authorities and edge.Shown in Fig. 8 A, when multiplication factor is 150,000 times, the intensive device profile of groove branch in the dual-damascene structure is observed slot wedge and inner with scanning electron microscopy without any material remnants; Shown in Fig. 8 B, multiplication factor is that 150,000 times scanning electron microscopy is observed the sparse device profile of groove branch in the dual-damascene structure, and groove is inner level and smooth, does not have coarse phenomenon; Shown in Fig. 8 C, when multiplication factor is 150,000 times, the device profile that groove branch in the dual-damascene structure is sparse to be observed, slot wedge raised brim and top do not have burr.Explanation is carried out wet etching with CLK888 to photoresist layer and sacrifice layer, removes the sacrifice layer below photoresist layer and the anti-reflection layer; Follow with oxygen gas plasma when temperature is 20 ℃ to 30 ℃, anti-reflection layer is carried out ashing, remove the method for anti-reflection layer, can not cause any material residual.
Fig. 8 A to Fig. 8 C, the model of used scanning electron microscopy is S5200.
With CLK888 photoresist layer and sacrifice layer are carried out wet etching, removing the sacrifice layer below photoresist layer and the anti-reflection layer simultaneously; Anti-reflection layer sinks down into the position that removes sacrifice layer, joins with following rete; Follow with oxygen gas plasma when temperature is 20 ℃ to 30 ℃, anti-reflection layer is carried out ashing, remove anti-reflection layer.At this moment, the groove of dual-damascene structure central authorities and edge are without any coarse out-of-flatness that residuals caused.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (8)
1. the manufacture method of a dual-damascene structure, the wafer that has formed groove and contact hole at first is provided, and upwards comprising conductor layer, cover layer, insulating barrier, separator, material on the described wafer successively is the sacrifice layer of DUO, anti-reflection layer and the photoresist layer that material is organic BARC; Groove is arranged in insulating barrier and insulating barrier all retes of top and runs through insulating barrier all retes of top but do not run through insulating barrier, and contact hole is arranged in insulating barrier and runs through insulating barrier, and is communicated with groove and cover surface; It is characterized in that, also comprise the following steps:
Employing CLK888 wet etching removes the sacrifice layer below photoresist layer and the anti-reflection layer simultaneously, and anti-reflection layer is sunk;
The ashing anti-reflection layer is peeled off anti-reflection layer;
Through follow-up intraconnections processing procedure, form dual-damascene structure.
2. the manufacture method of dual-damascene structure according to claim 1, it is characterized in that: the thickness of sacrifice layer is 1700 dust to 2500 dusts.
3. the manufacture method of dual-damascene structure according to claim 1, it is characterized in that: the thickness of photoresist layer is 4000 dust to 4500 dusts.
4. the manufacture method of dual-damascene structure according to claim 1, it is characterized in that: the thickness of anti-reflection layer is 200 dust to 300 dusts.
5. according to the manufacture method of each described dual-damascene structure of claim 1 to 4, it is characterized in that: the temperature of ashing anti-reflection layer is 20 ℃ to 30 ℃.
6. the manufacture method of dual-damascene structure according to claim 5, it is characterized in that: the time of ashing anti-reflection layer is 10 seconds to 15 seconds.
7. the manufacture method of dual-damascene structure according to claim 1, it is characterized in that: anti-reflection layer sinks down into the sacrifice layer position that removes, and joins with separator.
8. according to the manufacture method of each described dual-damascene structure of claim 1 to 4, it is characterized in that: the step of described follow-up intraconnections processing procedure is: photoresist layer, anti-reflection layer and sacrifice layer are removed the after etching coverlay expose until conductor layer; Plated copper film is imbedded in contact hole and the groove; The planarization plated copper film, and remove separator.
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