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CN100474601C - Low-dark current active picture element adapted to CMOS image sensor and producing method thereof - Google Patents

Low-dark current active picture element adapted to CMOS image sensor and producing method thereof Download PDF

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CN100474601C
CN100474601C CN 200510083008 CN200510083008A CN100474601C CN 100474601 C CN100474601 C CN 100474601C CN 200510083008 CN200510083008 CN 200510083008 CN 200510083008 A CN200510083008 A CN 200510083008A CN 100474601 C CN100474601 C CN 100474601C
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cmos
dark
current
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CN1889269A (en )
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金湘亮
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北京思比科微电子技术有限公司
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本发明的适用于CMOS图像传感器的低暗电流有源像素的结构在N衬底上生长一层P+型外延层,在P+型外延层上生长一层P型外延层,在P外延层区内注入一层N+区,并在N+区浅注入一层P区,从而形成两个PN结,可以吸收不同波长的注入光。 Low dark current applied to the CMOS image sensor according to the present invention, the active layer of the pixel structure is grown P + type epitaxial layer on an N substrate, growing a P type epitaxial layer on a P + type epitaxial layer, the epitaxial layer region in the P N + region implanted layer, and a shallow implanted P region a layer of N + region, thereby forming two PN junction, the injection may absorb light of different wavelengths. 本发明提出的是一种基于N衬底和光电二极管的有源像素结构,这种有源像素结构不仅有效的降低了暗电流、提高了量子效率,而且改进了在蓝光区域的量子效应。 The present invention is proposed based on active pixel photodiode structure of the substrate and the N, this active pixel structure not only effectively reduce the dark current to improve quantum efficiency and improving the quantum effects in the blue region. 由于减少了光产生的电子-空穴对的复合,因此可以产生相应的效果。 By reducing the light generated electron - hole pair recombination, it is possible to produce a corresponding effect. 利用N衬底可以有效的防止像素之间的光电荷的扩散,防止弥散现象。 N substrate by using a diffusion light charge between the pixels can effectively prevent, prevent diffusion phenomenon.

Description

适用于CMOS图像传感器的低暗电流有源像素及其制造方法技术领域本发明涉及微电子学的集成电路设计技术领域,尤其涉及一种适用于CMOS图像传感器的低暗电流有源像素及其制造方法。 Low dark current active pixel TECHNICAL FIELD applied to the CMOS image sensor according to the present invention relates to the field of integrated circuit design technology of microelectronics, in particular, low dark current, to a suitable active pixel CMOS image sensor and a manufacturing method. 背景技术虽然有源像素与CCD (Charge Coupled Device,中文:电荷耦合器件)出现的时间几乎相同,但由于CMOS ( Complementary Metal-Oxide-Semiconductor Transistor , 中文:互补/人属氧化物半导体)制造工艺不成熟,使得CCD的性能一直优于有源像素的性能,如CCD的固定图形噪声低、 像素面积小、分辨率高、图像质量好等。 Background Art Although the active pixel and the CCD: time of occurrence (Charge Coupled Device, Chinese Charge Coupled Device) is almost the same, but the CMOS (Complementary Metal-Oxide-Semiconductor Transistor, Chinese: complementary / person metal oxide semiconductor) manufacturing process is not mature, so that the CCD has better performance than the performance of active pixels, such as CCD low fixed pattern noise, small pixel area, high resolution, good image quality. 因此接下来将近10多年在有源像素方面的研究很少。 So the next nearly 10 years of research in terms of active pixel little. 现代有源像素的发展得益于CMOS工艺的改进,如降低了器件与器件之间不匹配、降低了制造成本、功耗大大降低等。 Thanks to the development of modern active pixel CMOS process improvements, such as reducing the mismatch between the device and the device, reducing manufacturing costs, greatly reduced power consumption and the like. 与无源像素相比,有源像素尽管由于MOSFET (Metal-Oxide -Semiconductor Field Effect Transistor ,中文:金属-氧化物半导体场效应晶体管)占了很大的面积,降低了填充系数,但能获得低的输出噪声、高的响应速度和大的输出摆幅,因此有源像素结构现在已成为CMOS图像传感器的设计主流。 Compared with the passive pixel, an active pixel Although the MOSFET (Metal-Oxide -Semiconductor Field Effect Transistor, Chinese: Metal - Oxide Semiconductor Field Effect Transistor) takes up a large area, the fill factor is reduced, but it can achieve low output noise, high response speed and a large output swing, so active pixel architecture design has now become the mainstream CMOS image sensor. 目前,CMOS图像传感器中的光电检测器主要釆用光电二极管和光栅晶体管,光电二极管具有较低的噪声、良好的均匀性和简单的版图结构,已广泛的使用;光栅晶体管具有与CCD工作类似的结构、很高的增益和宽的频谱响应范围,已引起国外研究者的兴趣。 Currently, CMOS image sensors in the main photodetector preclude the photodiode and photogate transistor, the photodiode having a low noise, good uniformity and a simple layout structure, has been widely used; grating and CCD transistor having similar work structure, high gain and wide spectral response range, has attracted the interest of foreign researchers.

然而,应用标准CMOS工艺制造的光电二极管存在PN结漏电流引起的噪声大、灵敏度低等问题;光栅晶体管因为栅极的吸收系数和反射系数较大引起光敏响应灵敏度较低等缺点。 However, the application of standard CMOS manufacturing process there is a large photodiode PN junction leakage current caused by noise, low sensitivity problem; photogate transistor since the absorption and reflection coefficients of the larger cause photosensitivity gate low response sensitivity disadvantages. 另外,随着CMOS工艺的发展,大量研究表明当工艺下降到0.25um时, 光电二极管的暗电流噪声增加、量子效应下降、漏电流增加。 Further, with the development of CMOS process, a large number of studies have shown that when the process down to 0.25um, photodiode dark current noise increases, the quantum effect decreased, the leakage current increases. 为了解决这些问题,1995年JPL/Kodak课题组提出基于Pinned Photodiode (光电二极管)的有源像素,其基本结构包含一个Pinned Photodiode、 一个复位晶体管、 一个源跟随晶体管、 一个行选择晶体管以及各一传输晶体管。 To solve these problems, in 1995 JPL / Kodak group proposed based Pinned Photodiode (photodiode) active pixel, the basic structure comprising a Pinned Photodiode, a reset transistor, a source follower transistor, a row select transistor, and each of a transmission transistors. 像素的工作原理与光栅有源像素相似,浮置扩散输出端被复位;传输晶体管用来传输信号电荷到节点,光电二极管本身通过复位晶体管和传输晶体管复位。 Works with pixel raster active pixel is similar to the floating diffusion output is reset; transfer transistor for transferring a signal charge to the node itself, the photodiode and the transfer transistor via the reset transistor resetting. 这种结构能够降低暗电流,提高量子效率,但是基于标准的CMOS工艺的P型衬底,仍未能根本改变衬底暗电流的问题。 This structure can reduce dark current and improve quantum efficiency, but the P-type substrate based on standard CMOS technology, problems have not been fundamentally altered substrate dark current. 发明内容鉴于上述现有技术所存在的问题,本发明的目的是提供一种适用于CMOS图像传感器的低暗电流有源像素及其制造方法,不仅有效的降低了暗电流、提高了量子效率,而且因为能吸收更长波长的光改进了在蓝光区域的量子效应。 In view of the above-described problems of the prior art, an object of the present invention is to provide a suitable low dark current and a manufacturing method of the active pixel CMOS image sensor, not only effectively reduce the dark current to improve quantum efficiency, and because it absorbs longer wavelength light is improved in the blue region of the quantum effects. 本发明的目的是通过以下技术方案实现的:一种适用于CMOS图像传感器的低暗电流有源像素,主体包括:N型硅衬底、P +硅外延层与P型硅外延层;P +硅外延层生长于N硅衬底上,P型硅外延层生长于P +硅外延层上;所述的「型硅外延层还设有〜+区,形成一个PN结;在N十区上还设有表面P区,形成另一个PN结。所述的「型硅外延层上还设有深?+区,深P+区与N+区接触;并且在深P十区上设有表面电极,并在表面电极上加有偏置电压。 Object of the present invention is achieved by the following technical solutions: A suitable low dark current active pixel CMOS image sensor, the body comprising: N type silicon substrate, P + silicon epitaxial layer and the P-type silicon epitaxial layer; P + silicon epitaxial layer grown on a silicon substrate, N, P-type silicon epitaxial layer grown on a P + silicon epitaxial layer; the "type epitaxial silicon layer also has a + region forming a PN junction; on the N + region P is also provided with a surface region, a PN junction is formed on the other "type silicon epitaxial layer is further provided with the deep + region, the contact region and the P + deep N + region;.? surface electrode and provided on a ten deep P region, and add a bias voltage on the surface electrodes.

所述的P型硅外延层上还设有P-阱,在P-阱上生长有栅氧层,在栅氧层上还生长有一层多晶硅层;在P-阱上还设有源漏区。 The P-type silicon epitaxial layer also has a P- well, the P- well grown on the gate oxide layer, a polysilicon layer is also grown on a layer of gate oxide; on the P- well region also has a source and drain . 所述的p型外延层上表面设有窄沟道隔离区,p区设于窄沟道隔离区下。 A trench isolation region is provided with a narrow surface of the p-type epitaxial layer, p channel region disposed at a narrow isolation region. 一种基于上述适用于CMOS图像传感器的低暗电流有源像素的制造方法,包括:A、 在N型硅衬底上外延生长P +型硅外延层;B、 在P +型硅外延层上面外延生长P型硅外延层;C、 在P型硅外延层热生长一层二氧化硅Si02,注入磷离子,激活磷离子同时将其趋入形成〜+区;D、 将硼离子注入到N+区中,经过高温退火,激活硼离子同时将其趋入,形成深P+区;E、 在P型硅外延层上生成读出电路的晶体管;F、 在N+区的表面生长一层二氧化硅Si02,注入离子BF2、形成表面P区。 Based on the above for low dark current active pixel CMOS image sensor manufacturing method, comprising: A, epitaxially grown P + type silicon epitaxial layer on an N type silicon substrate; B, the P + type silicon epitaxial layer above epitaxially grown P-type silicon epitaxial layer; C, in a P-type silicon epitaxial layer of silicon dioxide is thermally grown Si02 layer, phosphorus ions are injected, simultaneously activating phosphorus ions are formed into a chemotactic + region; D, boron ions are implanted into N + region, the high temperature annealing to activate the boron ions simultaneously into chemotaxis, forming a deep P + region; E, generates a readout transistor circuit on a P-type silicon epitaxial layer; F, the N + region surface layer of silicon dioxide grown si02, ion implantation BF2, P region to form a surface. 所述的步骤C还包括:生长的二氧化硅SiO2层厚度控制在100埃~ 150埃。 Said step C further comprising: silicon dioxide SiO2 layer 100 in controlling the growth of angstroms to 150 angstroms. 所述的步骤D还包括:在引线时将深P+区接地。 Said step D further comprises: a deep P + region of the ground at the lead. 所述的步骤E包括:E1、在P型硅外延层中形成P-阱;E2、在P-阱上生长栅氧层;E3、在栅氧层上长一层多晶硅层;E4、在P-阱中注入磷离子形成源漏区。 Said step E comprising: E1, formed in a P-type silicon epitaxial layer in the P- well; E2, the P- well grown on the gate oxide layer; E3, on the length of the gate oxide layer a layer of polysilicon layer; E4, the P - trap phosphorus ions are implanted to form the source and drain regions. 所述的步骤F包括:F1、在P型硅外延层上做出窄沟道隔离区;F2、在窄沟道隔离区下方的N+区的表面生长一层二氧化硅Si02,注入离子注入BF2、形成表面P区。 Said step F comprises: F1, to make the narrow trench isolation region on the P-type silicon epitaxial layer; F2, narrow channel below the surface of the N + region of the isolation region grown layer of silicon dioxide Si02, BF2 is implanted at an ion implantation forming surface of the P region. 由上述本发明提供的技术方案可以看出,本发明的适用于CMOS图像传感器的低暗电流有源像素的结构在N硅村底上生长一层P+型外延层,在P+型硅外延层上生长一层P型外延层,在P硅外延层区内注入一层N+区,并在N十区浅注入一层P区,/人而形成两个PN结,可以吸收不同波长的注入光。 Provided by the technical solution of the present invention can be seen, the present invention is applied to a CMOS image sensor of low dark current pixel structure of the active layer grown P + type epitaxial layer on a silicon substrate N, the P + -type silicon epitaxial layer growing a P type epitaxial layer, a layer of implanted N + regions in the P-epitaxial silicon layer region, and a shallow implanted P region a layer of N + region / human form two PN junctions may absorb different wavelengths of the injected light. 本发明提出的是一种基于N衬底和光电二极管的有源像素结构,这种有源像素结构不仅有效的降低了暗电流、提高了量子效率,而且改进了在蓝光区域的量子效应。 The present invention is proposed based on active pixel photodiode structure of the substrate and the N, this active pixel structure not only effectively reduce the dark current to improve quantum efficiency and improving the quantum effects in the blue region. 由于减少了光产生的电子-空穴对的复合,因此可以产生相应的效果。 By reducing the light generated electron - hole pair recombination, it is possible to produce a corresponding effect. 附图说明图1为本发明所述的适用于CM0S图像传感器的低暗电流有源像素结构示意图一;图2为本发明所述的适用于CMOS图像传感器的低暗电流有源像素结构示意图二;图3为本发明所述的适用于CMOS图像传感器的低暗电流有源像素制造过程示意图一;图4为本发明所述的适用于CMOS图像传感器的低暗电流有源像素制造过程示意图二;图5为本发明所述的适用于CMOS图像传感器的低暗电流有源像素制造过程示意图三;图6为本发明所述的适用于CMOS图像传感器的低暗电流有源像素制造过程示意图四; 1 shows a low dark current active pixel structure according to the present invention is applicable to an image sensor CM0S a schematic diagram; FIG. 2 according to the present invention is applicable to low dark current active pixel CMOS image sensor structure Diagram II ; FIG. 3 of the present invention, the low dark current is applied to the CMOS image sensor manufacturing process diagram of an active pixel; FIG. 4 of the present invention, low dark current applied to said active pixel CMOS image sensor manufacturing process Diagram II ; FIG. 5 is applied according to the invention in a schematic three low dark current active pixel CMOS image sensor fabrication process; for CMOS image sensor according to the present invention, FIG. 6 low dark current active pixel four schematic manufacturing process ;

图7为本发明所述的适用于CMOS图像传感器的低暗电流有源像素制造过程示意图五。 Low dark current active pixel manufacturing process of the present invention. FIG. 7 is applied to the CMOS image sensor is a schematic view of five. 具体实施方式本发明提出一种基于N衬底和Pinned Photodiode的有源像素结构,这种适用于CMOS图像传感器的低暗电流有源像素结构不仅有效的降低了暗电流、提高了量子效率,而且改进了在蓝光区域的量子效应。 DETAILED DESCRIPTION The present invention provides an active pixel structure N and Pinned Photodiode based substrate, such low dark current active pixel structure is applied to the CMOS image sensor not only effectively reduce the dark current to improve the quantum efficiency, and improved quantum effects in the blue region. 之所以可以产生相应的效果是由于减少了光产生的电子-空穴对的复合的结果。 The reason may produce a corresponding effect due to a reduction of light produced by the electron - hole pair recombination results. 本发明的适用于CMOS图像传感器的低暗电流有源像素的结构的具体实施方式一如图1所示,具体为:在N衬底1上生长一层P+型外延层2,在P+型外延层2上生长一层P型外延层3,在P外延层区3内注入一层N+区4,并在N+区4浅注入一层P区6,从而形成两个PN结,可以吸收不同波长的注入光。 Low dark current applied to the CMOS image sensor according to the present invention, an active pixel configuration of a particular embodiment shown in Figure 1, specifically: N substrate layer grown on the P + type epitaxial layer 12, the P + type epitaxial growing a layer 2 of P-type epitaxial layer 3, P injected into the epitaxial layer region 3 N + region layer 4, a layer of implanted P region 6 and the N + shallow region 4, thereby forming two PN junction can absorb different wavelengths the injected light. 在所述的P型外延层3上还设有深P十区5,深P十区5与N十区4接触。 In the P-type epitaxial layer 3 is also provided with five, ten deep P region 5 contacts ten deep P region and N + region 4. 在两个结PN处将光量子转变为光电荷,其中电子积累在N+区4,产生的空穴电荷积累在P区6靠近PN结的一边,很快被设于深口+区5上的偏置电压11吸走。 In the PN junction at the two photons of light into a charge, wherein electrons accumulate in the N + region 4, charges generated holes accumulated in the P side of the PN junction near region 6, it is provided in the deep mouth quickly on partial region 5 + 11 sucked counter voltage. 在所述的P型外延层3上还设有P-阱10,在P-阱上生长有栅氧层8,在栅氧层上还生长有一层多晶硅层9;在P-阱10上还设有源漏区分別为源极7 与漏极13。 In the P-type epitaxial layer 3 is further provided on the P- well 10, a gate oxide layer 8 is grown on the P- well, but also the growth of a layer of polycrystalline silicon layer 9 on the gate oxide layer; further on the P- well 10 source and drain regions are provided with a source electrode 7 and the drain electrode 13. 所述的多晶硅层9上设有传输栅12与栅极14,将电子电荷运走;当传输栅12上加一高电平,在栅氧化层8下形成一反型层,形成低的势垒,从而将电荷读出到NMOS ( N-channel metal oxide semiconductor, 中文:N通道金属氧化半导体)管的源极7。 12 and the gate of the transfer gate 9 is provided with a polysilicon layer 14, the electric charge carried away; plus a high level when the transfer gate 12, an inversion layer is formed under the gate oxide layer 8, a low potential barrier, so that the charge read out to the NMOS: a source (N-channel metal oxide semiconductor, Chinese N-channel metal oxide semiconductor) transistor is 7. NMOS管制造在P型阱内,NMOS管的漏极是13, 一般接在高电平上,当栅极14加一高电平将NMOS管置位,源极7置位 NMOS transistor fabricated within a P-type well, the drain of the NMOS transistor 13 is typically connected to the high level, plus a high level when the gate 14 is set to the NMOS transistor, the source electrode 7 is set

为高电平,当传输栅12为低电平时,光电荷读出,在NMOS管源极7将电荷积分转变为电压读出。 It is high, when the transfer gate 12 is low, the light charge readout, the charge integrator electrode 7 into the NMOS transistor source voltage readout. 本发明的适用于CMOS图像传感器的低暗电流有源像素的结构的种具体实施方式二如图2所示,其结构上在P型外延层上3设有窄沟道隔离区(shallow trench isolation ) 15, P区6设于窄沟道隔离区15下方。 DETAILED DESCRIPTION types of active pixel arrangement of a low dark current applied to the CMOS image sensor 2 of the invention shown in Figure 2, on a P type epitaxial layer 3 is provided with a narrow trench isolation regions (shallow trench isolation structure thereof ) 15, P region 6 narrow channel disposed below the isolation region 15. 本发明的有源像素的制造方法的工艺流程具体实施方式为,以实施例一为例:首先,如图3所示,在N型衬底1上外延生长P +外延层2,然后,再在P +外延层2上面外延生长P外延层3。 DETAILED process embodiment of the method of manufacturing the active pixel of the present invention is, in one embodiment as an example: First, as shown in FIG. 3, the substrate 1 on the N-type epitaxial layer epitaxially grown P + 2, and then the P + epitaxial layer 2 above the epitaxial layer 3 is epitaxially grown P. 其次,如图4所示,在P外延层3上热生长一层Si02 , Si〇2的厚度为100 埃〜150埃,其目的是减小P外延层3受到离子注入的损伤。 Next, as shown in the epitaxial layer 3 on the P layer 4 is thermally grown Si02, a thickness of 100 Å Si〇2 ~150 Å, which aims to reduce the P epitaxial layer 3 by ion implantation damage. 注入磷离子,然后高温退火,激活磷离子同时将其趋入形成N-阱,也就是N+区4。 Phosphorus ions are implanted, high temperature annealing then, phosphorus ions are activated simultaneously formed into the N- well chemotaxis, i.e. N + region 4. 第三,如图5所示,将高能量、大剂量的硼离子注入到N-阱中,经过高温退火,激活硼离子同时将其趋入,形成深P+区5。 Third, as shown in FIG. 5, a high energy, high dose of boron ions implanted into the N- well, through the high temperature annealing to activate the boron ions simultaneously chemotaxis into deep P + region 5 is formed. 在引线时,将深P+区接地,其作用是收集光生空穴。 When the lead, the deep P + region is grounded, and its role is to collect photogenerated holes. 第四,如图6所示,生成读出电路中晶体管,读出电路中晶体管的生成与传统基于CMOS工艺中制作NMOS的工艺流程相同。 Fourth, as shown in Figure 6, the readout circuit generating transistor, the reading of the CMOS process in the same production process generates an NMOS transistor in the conventional circuit. 首先在外延层3中形成P-阱10,生长栅氧层8,在栅氧层8上长一层多晶硅层9,最后注入离子形成源极7和漏极13。 P- well formed in the first epitaxial layer 310, a gate oxide layer 8 is grown on the gate oxide layer of 8 long polycrystalline silicon layer 9, the final ion implantation to form the source 7 and the drain electrode 13. 最后,如图7所示,为了防止将NMOS的源极7和漏极13驱深,在完成NMOS工艺后,要避免长时间的高温过程,所以,釆用低温氧化LTO方法在N-阱的表面生长一层Si02,作为减小离子注入损伤的保护层,然后,注入低能量、大剂量离子BF2+,形成表面P+区6, 使用RTP (Rapid Temperature Process,中文:快速高温处理)将其激活。 Finally, as shown in FIG. 7, in order to prevent the source of the NMOS 13 and the drain electrode 7 deep flooding, after completion of NMOS process, to avoid prolonged high temperature process, so that preclude the use of low-temperature oxidation method in N- well LTO grown on the surface layer of Si02, as reducing the ion protection layer damage injection, and then injected into a low energy, high dose ion BF2 +, the surface of the P + region 6 is formed using RTP (rapid temperature process, Chinese: rapid thermal process) to activate it. 本发明的有源像素的实施例二制造方法的工艺流程具体实施方法,与实 DETAILED DESCRIPTION Process for producing second method embodiment of the method of the present invention, the active pixel, and the solid

施例一的区别在P型外延层上3构造窄沟道隔离区15,然后在窄沟道隔离区15 下方注入低能量、大剂量离子BF2+,形成表面P+区6, 使用RTP将其激活。 Distinction embodiment one on the P-type epitaxial layer 3 is configured to narrow a trench isolation region 15, and then injected into a low energy below a narrow trench isolation region 15, high-dose ion BF2 +, the surface of the P + region 6 is formed, using the RTP activate. 该有源像素主要针对深亚微米工艺,由于采用窄沟道隔离技术将感光面积与表面隔离,可以获得低的暗电流和高的感光灵敏度。 The active pixel mainly for deep submicron technology, the use of narrow channel isolation area with the surface of the photosensitive isolated, low dark current can be obtained and a high photosensitivity. 暗电流的主要是由硅/二氧化硅之间的界面态或硅衬底的体态(bulk states) 产生。 The dark current is generated by the main body of the interface state between a silicon substrate or silicon / silicon dioxide (bulk states). 通过在N+区的表面浅注入一层P区,将体内与表面分开,将光转变为电荷的PN结位于半导体的体内,从而将暗电流降低。 By the surface region of the N + shallow implanted P region layer, the surface of the body to separate the light into the body of the semiconductor PN junction of the charge, thereby reducing dark current. 利用N衬底可以有效的防止像素之间的光电荷的扩散。 Diffused light charge between the pixels can effectively prevent the use of N substrate. N衬底本身有像N+扩散漏极的效果。 Effective N substrate itself as the N + drain diffusion. 当像素本身因照射光太强的时候,产生的多余电荷将向相临像素扩散,如果不加以疏散,将形成弥散(blooming)现象。 When the pixel by itself when irradiated with light is too strong, it will generate excess charge adjacent pixel diffusion, if not evacuated, forming the dispersion (Blooming) phenomenon. 当一个直流电位加在N衬底时,多余的电荷将被衬底收集,而不会向相临的像素扩散, 从而防止弥散现象。 When a DC potential is applied when the substrate N, the excess charges will be collected by the substrate, and does not spread to adjacent pixels, thereby preventing diffusion phenomenon. 暗电流的主要是由硅/二氧化硅之间的界面态或硅衬底的体态(bulk states)产生。 The dark current is generated by the main body of the interface state between a silicon substrate or silicon / silicon dioxide (bulk states). 大多数情况下,界面产生是体内产生的十倍。 In most cases, the interface generates ten times produced in the body. 在N衬底上生长一层P+型外延层,在P+型外延层上生长一层P型外延层,在P外延层区内注入一层N+区,在N+区的表面浅注入一层P区,将体内与表面分开, 将光转变为电荷的PN结位于半导体的体内,从而将暗电流降低,同时因为形成了两个PN结,增加了储存电荷的容量。 N layer grown on the substrate P + type epitaxial layer, a layer of P-type epitaxial layer grown on a P + type epitaxial layer, a layer of implanted N + regions in the P-epitaxial layer region, shallow implant layer on the surface of the P region of the N + region to separate the body surface, the light is converted inside the body of the semiconductor PN junction charge, thereby reducing the dark current, and because of the two PN junctions are formed, the charge storage capacity is increased. 以上所述,仅为本发明较佳的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。 Above, the present invention is merely preferred specific embodiments, but the scope of the present invention is not limited thereto, any skilled in the art in the art within the scope of the invention disclosed can be easily thought of the changes or Alternatively, it shall fall within the protection scope of the present invention. 因此,本发明的保护范围应该以权利要求的保护范围为准。 Accordingly, the scope of the present invention should be defined by the scope of the claims.

Claims (8)

1、一种用于CMOS图像传感器的低暗电流有源像素,其特征在于,主体包括:N型硅衬底、P+硅外延层与P型硅外延层;P+硅外延层生长于N衬底上,P型硅外延层生长于P+硅外延层上;所述的P型硅外延层还设有N+区,形成一个PN结;在N+区上还设有表面P区,形成另一个PN结。 A low dark current active pixel CMOS image sensor, characterized in that the body comprises: N type silicon substrate, P + silicon epitaxial layer and the P-type silicon epitaxial layer; P + silicon epitaxial layer grown on the substrate N a, P-type silicon epitaxial layer grown on a P + silicon epitaxial layer; the P-type epitaxial silicon layer is also provided with N + region forming a PN junction; N + region on the surface of the P region is also provided, in another PN junction is formed .
2、 根据权利要求1所述像素,其特征在于,所述的P型硅外延层上还设有深P+区,深P+区与N+区接触;并且在所述深「+区上设有表面电极, 并在表面电才及上加有偏置电压。 2. The pixel of claim 1, wherein the depth of the P + region is also provided on the P-type silicon epitaxial layer, in contact with the P + region and a deep N + region; and provided on a surface of the deep "+ region electrode, and has a bias voltage was applied, and the upper surface of the current.
3、 根据权利要求1所述的像素,其特征在于,所述的P型硅外延层上还设有P-阱,在P-阱上生长有栅氧层,在栅氧层上还生长有一层多晶硅层; 在P-阱上还设有源漏区。 3, according to the pixel according to claim 1, wherein further provided on the P- well of the P-type silicon epitaxial layer grown on the P- well with a gate oxide layer further grown on a gate oxide layer layer, a polysilicon layer; on the P- well region also has a source and drain.
4、 根据权利要求1、 2或3所述的像素,其特征在于,所述的P型硅外延层上表面设有窄沟道隔离区,P区设于窄沟道隔离区下。 4, the pixel according to claim 1, 2 or 3, characterized in that the surface is provided with narrow channel P-type isolation region on the silicon epitaxial layer, P channel region disposed at a narrow isolation region.
5、 一种用于CMOS图像传感器的低暗电流有源像素的制造方法,其特征在于,包括:•A、 在N型硅衬底上外延生长P +型硅外延层;B、 在P +型硅外延层上面外延生长P型硅外延层;C、 在P型硅外延层热生长一层二氧化硅,注入磷离子,激活磷离子同时将其趋入形成~+区;D、 将硼离子注入到N+区中,经过高温退火,激活硼离子同时将其趋入,形成深P+区;E、 在P型硅外延层上生成读出电路的晶体管;F、在N+区的表面生长一层二氧化硅,注入离子BF",形成表面P区。 5, a method for producing an active low dark current pixel for a CMOS image sensor, characterized by comprising: • A, on the N type silicon substrate epitaxially grown P + type silicon epitaxial layer; B, the P + type silicon epitaxial layer epitaxially grown P-type silicon epitaxial layer; C, the P-type epitaxial silicon layer is thermally grown layer of silicon dioxide, phosphorus ions are injected, simultaneously activating phosphorus ions are formed into a chemotactic + region; D, boron ions are implanted into N + region, the high temperature annealing to activate the boron ions while being drive-in, forming a deep P + region; E, generates a readout transistor circuit on a P-type silicon epitaxial layer; F, the surface of the N + region growing a layer of silicon dioxide, ion implantation BF ", is formed surface of the P region.
6、 根据权利要求5所述的制造方法,其特征在于,所述的步骤C还包生长的二氧化硅层厚度控制在100埃~ 150埃。 6. The method of manufacturing according to claim 5, characterized in that the thickness of the silicon dioxide layer is grown in step C further controlled to 100 angstroms to 150 angstroms.
7、 根据权利要求5所述的制造方法,其特征在于,所述的步骤D还包在引线时将深P+区接地。 7. The method of manufacturing according to claim 5, wherein said step D further deep P + region of the ground at the lead.
8、 根据权利要求5所述的制造方法,其特征在于,所述的步骤E包括: E1、在P型硅外延层中形成P-阱;E2、在P-阱上生长栅氧层;E3、在栅氧层上长一层多晶硅层;E4、在P-阱中注入磷离子形成源漏区。 8. The method of manufacturing according to claim 5, wherein said step E comprising: E1, P- well formed in a P-type silicon epitaxial layer; E2 of, the P- well grown on the gate oxide layer; E3 , on the gate oxide layer of polysilicon layer length; E4, phosphorus ions implanted in the source and drain are formed in the P- well region.
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