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用于使用多个交错删除指针来检测和校正错误的装置

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Publication number
CN100474430C
CN100474430C CN 200510062622 CN200510062622A CN100474430C CN 100474430 C CN100474430 C CN 100474430C CN 200510062622 CN200510062622 CN 200510062622 CN 200510062622 A CN200510062622 A CN 200510062622A CN 100474430 C CN100474430 C CN 100474430C
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techniques
detecting
correcting
errors
pointers
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CN 200510062622
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English (en)
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CN1722276A (zh )
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维普尔·斯里瓦斯塔瓦
马丁·哈斯纳
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日立环球储存科技荷兰有限公司
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0064Concatenated codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • G11B2020/1843Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information using a cyclic redundancy check [CRC]

Abstract

用于检测和校正在两级分组代码结构中形成的数据字节中的突发错误的技术。第二级解码器使用分组级检验字节来检测包含错误字节的、在两级分组代码结构中的列。第二级解码器产生删除指针,用于标识已经被突发错误影响的、在两级分组结构中的列。然后,第一级解码器使用码字检验字节来校正在通过删除指针而标识的列中的所有字节。释放第一级解码器以使用所有的码字检验字节来仅仅用于错误字节值计算。第一级解码器不需要使用任何码字检验字节来用于错误位置计算,因为由第二级解码器产生的删除指针提供了所有的必要错误位置。本技术加倍了第一级解码器的纠错能力。

Description

用于使用多个交错删除指针来检测和校正错误的装置 技术领域本发明涉及用于检测和校正在存储介质上的错误的技术,具体涉及用于 以多级综合交错格式使用多个交错删除指针来检测和校正在存储介质上的误 差的技术。背景技术数据字节以被称为码字(扇区)的多个组被存储在磁介质上。通常,512 个数据直接被存储在每个码字中。数据字节的码字可以包括多个交错字(即 数据字节串或向量)和按字节交错(byte-interleaved)的对应的检验字节。在以多个分组(block)记录在存储介质上的长字节串中检测和校正多字 节错误。每个分组包括多个码字和从所述码字得到的多个分组级的检验字节。应的码字来产生和记录每个分组。所述对应码字包括按照相同的线性纠错码 的码字检验字节。接着,逻辑求和所述码字。所述码字和它们的逻辑和在被 记录到存储器件等之前以预定的模式被交错。在在此通过引用而并入的美国专利5,946,328中讨论了用于检测和校正 错误字节的技术的其它细节。三个数据流m"x)、 m2(x)和m3(x)被用作示例。 所述数据流中的两个m,(x)和m2(x)由第一里德-索罗蒙(RS )线性编码器编码, 所述第一里德-索罗蒙(RS)线性编码器产生相应的码字c"x)和c2(x)。这个 第一 RS编码器向每个码字附加2t,个检验字节。第三数据流m3(x)在被第二 RS编码器编码之前被修改以形成逻辑(模2 ) 和m,(x)+m2(x)+m3(x)。这个第二 RS编码器包括在逻辑求和的数据流的码字C,(X)内的2t,+2t2个检验字节。码字C3(X)表示三个码字的逻辑和 d(X)+C2(X)+C,(X)。第三码字C3(X)当以这种方式产生时包含2t2个共享的分组检 J睑字节和个独立检验字节,所述分组检验字节是RS码字的内部并且是其 固有部分。通过线性纠错编码相应的lt据字节串mi(x)和ni2(x)而产生码字中的两个 c,(x)和c2(x),码字d(x)和C2(X)需要2t!检验字节。也通过线性编码m"x)、 m2(x)和m3(x)的模2和产生码字c,(x)。码字c,(x)需要2t,+2t2检验字节。数据 字节串m"x)和m2(x)^皮附加由^(x)表示的2t2个零,以便保证相等的码字长度。 然后,码字输出可以表达为:<formula>formula see original document page 5</formula>码字c,(x琳进一步处理以通过求三个码字c,(x)、 c"x)和c,(x)的模2和而 产生修改的、第三码字C3(x),以使得:<formula>formula see original document page 5</formula>检验字节rs(x)是由m"x)、 ni2(x)和m3(x)共享的分组检验字节,而r3(x) 是数据流m3(x)的独立检验字节,检验字节r,(x)、 r"x)和r3(x)是第一纽J^验字节。这些枱r验字节可以仅仅 用于分别校正在码字Cl(X)、 C2(X)和C3(X)内的数据字节中的t!个错误。在码字C3(x)内的检验字节ra(x)是第二(分组)^r验字节,可以用于校正在码字c!(x)、C2(X)和C3(X)的任何一个中的h+t2个数据字节餘误。在这些计算后,码字d(X)、 C2(X)和C3(X)的一个综合的交错分组被写出到盘。随后,当盘必须执行读取或读取修改写入命令等时, 一个被寻址的分组或多个码字的分组从它们在盘上的轨道位置流出(stream)。根据码字的校正 子(syndrome)处理,在盘上的任何错误被即时地检测和校正。所述校正子 是从所声称的码字和它们的逻辑和模2得到的。非零的校正子指示错误字节。 任何非零的校正子在码字上被标识和处理以校正错误的字节,被更新的分组字中的皿字节。在此通过引用而并入的美国专利6,275,965描述了一种在两级代码结构 中校正错误字节的系统。可以使用每码字2t,个检验字节来定位和校正在一个 码字中的最多t!个g字节,具有超出其t,个码字校正能力的错误字节的一 个码字是一个突发子分组。可以使用B气2t2)个分组级检验字节来在B个突发

子分组中定位和校正最多t一t2个错误字节。一个后编码处理被提供来将所计算的码字"去交错"或重新分布为修改 的码字,以4吏得在同一码字中定位数据向量和它们的码字检-睑字节,在码字 中分布了分组级的^^验字节。在6,275,965专利中描述的技术用于校正在码字的随机位置发生的错误 字节。但是,在码字中的错误字节的数量可以超过在6,275,965专利中描述的 技术的校正能力,这些类型的#^被称为突发错误。突发错误可以例如作为 在磁盘上的划痕或缺陷的结果而出现。因此,期望提供用于检测和校正在两级分組代码结构中形成的数据字节 中出现的突发,的其它技术,发明内容本发明提供了用于检测和校正在两級分组代码结构中形成的数据字节中 的突发错误的技术。按照本发明,第二级解码器使用分组级检验字节来检测 包含错误字节的、在两級分组代码结构中的列,第二级解码器产生删除指针, 用于标识已经被突发餘淡影响的、在两級分组结构中的列。第一级解码器然后使用码字检验字节来校正在通过删除指针而标识的列 中的所有字节.本发明释放了第一级解码器以使用所有的码字检验字节来仅 仅用于错误字节值计算.第一级解码器不需要使用任何码字检验字节来用于 错误位置计算,因为由第二级解码器产生的删除指针提供了所有的必要错误 位置。第一級解码器的纠错能力被加倍,因为释放了所有的码字检验字节以 仅仅用于错误值计算。根据下面的详细说明和附图,本发明的其他目的、特征和优点将变得清 楚,在全部附图中,类似的附图标号表示类似的功能部件。附图说明图1A是详细说明包括用于实现即时纠错码的即时纠错码(ECC)系统的 緩冲硬盘驱动控制器的结构的方框图.图1B是用于描述沿着困1A的硬盘驱动控制器的读取通道和写入通道的 数据流的数据存储系统的方框图。 图2困解了按照本发明的两级分组代码结构。 图3图解了按照本发明的用于检测和校正随机错误的第一级解码器。 图4图解了按照本发明的技术的用于检测突发错误的第二级解码器。 图5图解了按照本发明的技术的用于校正突发错误的第一级解码器。具体实施方式图1A和图1B困解了用于读取和向磁硬盘上写入数据的硬盘驱动控制系 统的一个示例,图1A-1B的硬盘驱动控制系统是可以实现上述的本发明的技 术的硬盘驱动系统的一个示例.图1A-1B的硬盘驱动系统检测和校正在从盘 读取的数据中的發溪.图IA-IB的硬盘驱动系统可以用于实现本发明的纠错 技术,下面详细讨论它们。图1A困解了被緩冲的硬盘驱动控制器的示例结构,硬盘驱动控制器50 配置成相对于磁硬盘14读取和写入数据。控制器50包括即时纠错码(ECC) 系统IOO,用于实现即时纠错码。即时纠错码系统100包括ECC读取处理器 163和ECC写入处理器167。图1B是包括即时纠错码系统100的、图1A的硬盘驱动控制器50的方 框图,当数字二进制数据序列要被写入在盘14上的时候,它们被暂时地布置 在图1A所示的緩冲器165中,并且随后沿着写入路径或通道被处理和转换 (167、 169和157)。硬盘驱动控制器50包括困1B所示的逻辑驱动电路105,用于格式化来 自硬盘组件33的数据,例如从8比特到32比特.盘组件33由盘14和包括 主轴电机的磁头组组件组成.先入先出寄存器110存储格式化数据,并且将 其与扇区緩冲器120交换。ECC系统100从驱动逻辑电路105接收格式化数 据,并且执行纠错编码算法,ECC系统100也可以执行本发明的所述技术和 处理,下面详细说明.緩沖管理器115控制在ECC系统100、扇区緩冲器(即随机存取存储器) 120和微处理器125之间的数据通信。另一个先入先出检测器130存储数据 和将其与扇区緩冲器120交换.序列控制器135连接在驱动逻辑电路105、 微处理器125和主机接口 140之间,用于控制通过硬盘驱动控制器50的数据 通信和各种命令的序列操作。主机接口 140提供了在硬盘驱动控制器50和主 机60之间的接口。

首先,从緩冲器165去除和通过ECC写入处理器167流出在一个数据串 中的预定数量的二进制数据元一一也称为字节。在ECC写入处理器167中, 数据字节被映射为从适当的线性分组或诸如里德-索罗蒙码的循环码得到的 码字。接着,每个码字在写入路径信号整形单元169中被映射为游程长度受 限的或其他带通的或频谦整形的代码,并且被改变为时变信'号。所述时变信 号通过接口读取/写入转换器接口 157被施加,然后纟皮施加到在》兹致电阻(或 其他适当的转换器头)中的写入元件,用于转换为磁通量分布图。从来自緩冲器165的二进制数据元的移动开始直到当旋转的盘14在读取 /写入头下通过时在所选择的盘轨道上写入磁通量分布图为止的所有措施被 同步和流出。为了有效的数据传送,数据被一次降级(写出)或升级(读取) 一个码字。因此,必须在定义在转换器下移动的记录轨道长度单位的时间间隔内良 好地进行将二进制数据映射为里德-索罗蒙码字和向产生时变信号的通量的 转换。记录轨道长度的典型单位是512字节的相等固定长度字节的码字。当要从盘14读M通量分布图的序列时,它们在读取路径或通道(157, 159、 161和163)中被处理,并且被写入到緩冲器165中,由转换器感测的 时变信号通过读^/写入转换器接口 157被传送到数字信号提取单元159。在 此,检测所述信号,并且确定是否它应当被解析为二进制的1或0。当这些l 和0流出信号提取单元159时,它们在格式化单元161中被排列为码字。因为读取路径正在评估先前在盘14上记录的里德-索罗蒙码字的序列, 因此在没有错误或删除的情况下,所述码字应当是相同的。为了测试是否是 这样,每个码字从格式化器161通过一条路径被施加到ECC读取处理器163。而且,来自ECC处理器163的输出被写入到緩冲器165。读取路径也以 同步数据流出的方式工作,以使得在码字内及时地定位和校正任何所检测的 错误,以使得ECC读取处理器163接收从盘轨道读取的下一个码字。微处理 器125可以监;f见和控制緩冲器165和读写通道,以保证效能,其中引用的模 式可以支配不去除路径,诸如顺序读取引用。数据字节通常以码字被存储在数据存储盘中,码字的子集被分组为长分 组。每个码字包括第一级CRC/ECC字节,每个分组包括第二级ECCB字节。数据存储系统使用第一级CRC和ECC字节来定位和校正在码字内的数 据字节中的错误。当在要由第一级ECC字节校正的数据字节中存在太多的错 误时,所述数据存储系统使用第二级ECCB字节来如上详细所述地校正错误。 ECCB字节用于校正在分组中的任何码字中的数据字节。当第一级和第二级 CRC和ECC字节有错误时,会发生發溪的误校正。Asano等的、2003年8月7日公开的美国专利申请公开US 2003/0147167 Al——在此通过引用将其并入一一 中进一步详细地讨论了用于数据存储或 通信器件的编码和解码处理,出现突发错误(也称为硬错误)。因为数据字节.以码字和数据字节分组彼此相 邻地被存储在磁盘上,因此突发错误擦除在数据分組的码字内彼此相邻地定 位的数据字节.本发明提供了用于检测和校正由在存储介质上的突发错误损坏的数据字 节的技术。本发明的技术利用事实:突发餘溪导致在分组的码字内彼此相邻 地定位的祐:损坏的数据字节。多个数据流被编码以产生码字,如上和在美国专利5,946,328和6,275,965 中进一步详细所述。码字包括数据字节和检验字节。码字包括两级检验字节。 每个码字d、 c2、 c3、…分别包括第一级检验字节n、 r2、 r3、...,它们可以 用于校正个具有發溪的数据字节.所述码字的一个或多个也包括多个第二 (分组)级^r验字节rB,它们可以用于校正在具有错误的码字的任何一个中 的trK2个数据字节.仅仅包括第一,验字节的码字被称为第一级码字。包括第二级检验字 节的码字被称为第二级码字.在交错的格式中,第一和第二级码字以两級分组代码结构布置。可以表 达所述分组以使得每个码字d、 c2、 c3、…在图2所示的分组中是一行。第一 级码字被嵌套而形成在分组中的第一代码Cl,第二级码字被嵌套而形成在分 组中的第二代码C2。每个码字总共具有n个字节。在每个第一级码字中的数据字节的数量是 kl。在每个笫二级码字中的数据字节的数量是k2。每个第一级码字具有2t, 个检验字节,每个第二级码字具有2t2个检验字节。B是可校正的突发码字的 数量,m是数据向量的数量。在两个码字之间的汉明距离是它们不一致的码元的数量。可以证明,为 了校正T个字节错误,编码方案要求使用具有在码字之间的至少2T+1的汉 明距离的码字。第一代码C1的汉明距离是d,-2trH。第二代码C2的汉明距 离是d2-2t2+l,其中山<(12。图2所示的分组C包括代码Cl和C2。分组C被应用到综合矩阵的逆矩 阵V^以重新分布数据向量、码字检验字节和分组级检验字节,如参照美国专 利6,275,965的图5和6而进一步详细所述。综合矩阵如图2所示。使用解码器来根据在形成交错分组的码字的任何一个中检测的校正子产 生错误位置和校正值.在解码一个分组前,所述分组首先被去复用以分离出 数据字节串、分组检验字节和码字检验字节,以便可以对它们进行有效性测 试。校正子产生器产生用于在分组中的码字的校正子。校正子产生技术是本 领域内的技术人员公知的。从码字得到的校正子被应用到笫一级里德-索罗蒙解码器。第一级里德-索罗蒙解码器可以检测和校正在任何单个码字中的具有错误的t,个字节。里 德-索罗蒙解码器是本领域内的技术人员公知的。图3图解了包括四个码字d、 c2、 c3、 C4的分组200的一个示例。每个码 字包括数据向量m和档r验字节(阴影部分)。在分組200中存在四个数据向 量m,并且B-1'码字Ci被应用到第一级解码器201。解码器201可以检测和校正在码字中的数据向量中出现的随机m。解 码器201使用校正子iWr测和校正在四个码字的任何一个中的具有错误的t, 个字节。解码器201输出所校正的码字cV所校正的码字包括所校正的数据向量,被校正的错误的数量7i小于第一级汉明距离的一半(7,<山/2)。另一个校正子产生器根据在分组中的第二(分组)级检验字节而产生任 何非零的校正子。这些校正子祐^修改以去除由第一级解码器定位的任何错误 的效果。如果所更新的校正子是零,则由第一级解码器计算的校正被看作正 确的,但是,如果所更新的校正子是非零的或如果第一级解码器检测到错误, 则在故障阶段中的第 一级校正子和第二级分組校正子被应用到第二级里德-索罗蒙解码器。因此,如果第一级解码器201在校正码字之一中的错误时不成功,则第 二级里德-索罗蒙解码器尝M正有错误的字节。第二级里德-索罗蒙解码器使 用码字检验字节和分组检验字节来校正有脊溪的字节,如图4所示。第二级解码器可以校正在所有码字的和中有错误的7"2个字节。两级分组结构使得所有的交错的和是第二代码C2中的码字.在存在突发 错误时,在码字中的相邻码元被删除。作为所有的交错的和来获得的、在第 二级码字中的码元是在码字中的相邻码元的和,因此,由第二级解码器计算 的错误位置是所有交错的自然删除位置。本发明利用这个事实来定位和校正 突发错误。码字Ci被应用到困4所示的第二级解码器301。第二级解码器301可以 定位已经被突发餘溪影响的、在两級分組代码结构中的列,解码器301接收 从码字检验字节产生的校正子和从分组»验字节产生的校正子。使用这些 校正子,解码器301可以检测包括错误的列。第二级解码器301输出删除指针Ei。删除指针指向包括错误的、在两级 分组结构中的字节的列,因此,第二级代码C2仅仅用于检测在分组中的错误 字节的位置。因为突发脊溪影响相邻的字节,因此通常擦除在一个分組中的 字节的整个列.第二级代码C2 (它包括分組,验字节)标识具有错误的列. 在突发错误情况下,有可能在被影响的列中的许多或所有字节包含错误。然 后使用第一级代码Cl来校正由删除指针标识的列中的所有字节。例如,在图4中的分组300包括四个码字c,、 c2、 C3和C4。删除指针311、 312和313指向在分组300中的第一、第三和第四字节列。可以校正的错误 的数量T2小于第二级汉明距离的一半(T2<d2/2)。删除指针Ej和码字Cj然后被输入到第一级解码器401,如图5所示。第 一级解码器401校正在由第二级解码器301预先处理的两级分组代码结构中 的突发脊溪。解码器401将由第二级解码器301产生的删除指针解译为有错 误的字节的位置,每个删除指针指向包含错误字节的一个分组列。第一级解 码器401使用第一级码字枱:验字节来校正在由删除指针标识的列中的每个字 节。第一级解码器401输出被校正的码字cV如果删除指针Ei的数量等于Pi,则乃和A的所有可能组合为真,诸如2Ti+Pi〈d"按照本发明,第二级解码器301仅仅使用分组级检验字节来检测包含错 误字节的列。所述分组^i^验字节不用于纠错。然后,第一级解码器401使 用所述码字检验字节和删除指针来校正在所标识的列中的所有字节。这种技术释放了第 一级解码器将码字检验字节仅仅用于错误值计算,因 为第一级解码器不需JH吏用任何码字检验字节来用于餘溪位置计算。第一级 解码器的纠错能力加倍,因为释放了所有码字检验字节以用于错误字节值计 算。现有技术系统使用第一级检验字节来用于错误检测和校正。

如上所述,在美国专利5,946,328和6,275,965中所述的现有技术用于校 正在两级分组结构中组织的数据流中的随机错误。所述系统可能不能确定错 误是否是随机错误或突发错误.因此,如果现有技术不能校正有错误的所有 字节,则本发明的技术可以尝试校正有错误的字节.如果错误是突发错误, 则本发明更可能能够校正有#^的所有字节。虽然已经参照本发明的特定实施例在此说明了本发明,在本发明中意欲 进行修改、各种改变和替代.在一些情况下,可以在不脱离所给出的本发明 的范围的情况下不对应地使用其他特征而使用本发明的特征。因此,可以在 不脱离本发明的必要范围和精神的情况下,使得许多修改适合所公开的特定 配置或方法。意欲本发明不限于所公开的特定实施例,而是本发明将包括落 入权利要求的范围内的所有实施例和等同内容。

Claims (17)

1. 一种盘驱动控制器,用于校正在数据字节中的多个突发错误,所述盘驱动控制器包括:第一级解码器;以及第二级解码器,它使用分组级检验字节来检测在包含突发错误的数据字节的两级分组结构中的列,其中,第二级解码器产生删除指针,用于标识在包含突发错误的两级分组结构中的列,第一级解码器使用在所述两级分组结构中的码字检验字节来校正在由所述删除指针标识的列中的所有数据字节,以及第一级解码器不将任何码字检验字节用于错误位置计算。
2. 按照权利要求l的盘驱动控制器,其中,第一级解码器配置成使用码
3. 按照权利要求2的盘驱动控制器,其中,如果第一级解码器未校正所 有的随枳4普误,则第二级解码器使用分组级检_睑字节来校正在一个码字中的 随机错误,以及如果第 一级和第二级解码器都未校正所有的随机错误,则第二级解码器 仅仅产生删除指针。
4. 按照权利要求1的盘驱动控制器,其中,盘驱动控制器去交错数据字 节的两级分组结构,以分离出数据字节、分组级检验字节和码字检验字节。
5. 按照权利要求1的盘驱动控制器,其中,盘驱动控制器产生校正子, 用于在两级分组结构中的数据字节的纠错。
6. 按照权利要求1的盘驱动控制器,其中,数据字节的两级分组结构被 应用到综合矩阵的逆矩阵V",以重新分布数据字节、码字检验字节和分组级 检验字节。
7. 按照权利要求1的盘驱动控制器,其中,第一和第二级解码器是里德 -索罗蒙解码器。 ,
8. 按照权利要求l的盘驱动控制器,其中,盘驱动控制器包括纠错码读 取处理器和纠错码写入处理器。
9. 一种盘驱动系统,用于校正在数据字节中的多个突发错误,所述盘系统包括:盘组件,由盘和包括主轴电机的磁头组组件组成;以及盘驱动控制器芯片组,它包括第一级和第二级解码器,其中,第二级解码器使用分组级检验字节来检测在包括突发错误的数据字节的两级分组结构中的列,第二级解码器产生删除指针,用于标识在包含突发错误的两级分组结构中的列,第 一级解码器使用在两级分组结构中的码字检验字节来校正在由删除指 针标识的列中的所有数据字节。
10. 按照权利要求9的盘驱动系统,其中,第一级解码器不将任何码字 检验字节用于错误位置计算,第一级解码器使用用于错误值计算的所有码字 检验字节。
11. 按照权利要求IO的盘驱动系统,其中,第一级解码器配置成在第二 级解码器用于检测突发错误之前使用码字检验字节检测和校正在数据字节中 出现的随机错误。
12. 按照权利要求11的盘驱动系统,其中,如果第一级解码器未校正所 有的随机错误,则第二级解码器使用分组级检验字节来校正在一个码字中的 随机错误。
13. 按照权利要求9的盘驱动系统,其中,盘驱动控制器去交错数据字 节的两级分组结构,以分离出数据字节、分组级检验字节和码字检验字节。
14. 按照权利要求9的盘驱动系统,其中,盘驱动控制器产生校正子, 用于在两级分组结构中的数据字节的纠错。
15. 按照权利要求9的盘驱动系统,其中,盘驱动控制器包括纠错码读 取处理器和纠错码写入处理器。
16. 按照权利要求9的盘驱动系统,其中,第一和第二级解码器是里德-索罗蒙解码器。
17. 按照权利要求9的盘驱动系统,其中,数据字节的两级分组结构被 应用到综合矩阵的逆矩阵V1,以重新分布数据字节、码字检验字节和分组级 检验字节。
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