CN100449392C - Thin-film transistor LCD pixel structure and manufacturing method therefor - Google Patents

Thin-film transistor LCD pixel structure and manufacturing method therefor Download PDF

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Publication number
CN100449392C
CN100449392C CNB2006101038660A CN200610103866A CN100449392C CN 100449392 C CN100449392 C CN 100449392C CN B2006101038660 A CNB2006101038660 A CN B2006101038660A CN 200610103866 A CN200610103866 A CN 200610103866A CN 100449392 C CN100449392 C CN 100449392C
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layer
electrode
photoresist
zone
insulation course
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CN101118356A (en
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邱海军
王章涛
陈旭
闵泰烨
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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Priority to CNB2006101038660A priority Critical patent/CN100449392C/en
Priority to JP2007203388A priority patent/JP4740203B2/en
Priority to US11/834,118 priority patent/US7916230B2/en
Priority to KR1020070078570A priority patent/KR100865451B1/en
Publication of CN101118356A publication Critical patent/CN101118356A/en
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Publication of CN100449392C publication Critical patent/CN100449392C/en
Priority to US13/069,767 priority patent/US8040452B2/en
Priority to US13/273,460 priority patent/US8289463B2/en
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Abstract

The present invention discloses a pixel structure of a film transistor LCD, and includes a glass baseplate, a gate line, a gate electrode and so on, wherein the gate electrode and the bar line are arranged in turn on a first insulated layer, an active layer and an adulteration layer; the gate electrode and the first insulated layer, the active layer and the adulteration layer above the gate electrode form a gate islet jointly; a second insulated layer covers at the circumjacent position of the glass baseplate, the gate line and the gate islet; a source electrode and a data wire are integrated into a whole and positioned above the second insulated layer, a pixel electrode material layer is provided at the lower part, at the circumjacent position of the gate islet, the source electrode is connected with the adulteration layer on the gate electrode; a pixel electrode is positioned above the second insulated layer; one end of a leakage electrode is connected with the adulteration layer on the gate electrode, and the other end of the leakage electrode is related joint on the pixel electrode. The present invention discloses a manufacturing method for the pixel structure of the film transistor LCD synchronously. Due to adopting the method of three-time lithographic mask plate forming a film transistor, the present invention has the advantages of saving the cost of array technics and the machine utilizing time, and improving the production capacity.

Description

A kind of pixel structure for thin film transistor liquid crystal display and manufacture method thereof
Technical field
The present invention relates to Thin Film Transistor-LCD and manufacture method thereof, pixel structure for thin film transistor liquid crystal display and manufacture method thereof that particularly a kind of third photo etching technology is made.
Background technology
At present in the method that conventional thin film transistor LCD device is made, array processes is used the method for five lay photoetching mask plates, a part adopts the method for four lay photoetching mask plates, and wherein four lay photoetching mask plates mainly adopt the technology of gray tone (Gray Tone) mask that thin film transistor channel source leakage metal electrode and active layer partly partly carried out etching.
This structure comprises following process sequence at conventional four lay photoetching mask plates:
At first, utilize conventional grid technique to form the grid layer, deposit gate insulation layer then.
Then, the deposited semiconductor active layer, doped layer, metal level is leaked in the source.Utilize Gray Tone mask to form the island of thin film transistor (TFT), carry out cineration technics, expose channel part, the metal level of etching channel part, the doped layer of etching channel part, active layer.Because need be to active layer, metal level also has the etching of doped layer in this step process, thus in photoetching process, need the photoresist control of Gray Tone channel part quite strict, in addition to the selection of etching than and homogeneity very high requirement is all arranged.So the tolerance for technology requires very high.
Summary of the invention
The objective of the invention is defective, propose the way that a kind of thin-film transistor liquid crystal display array structure and third photo etching technology thereof are made this structure, reduce the requirement of process allowance and the design of simplifying thin film transistor (TFT) at prior art.
To achieve these goals, the invention provides a kind of pixel structure for thin film transistor liquid crystal display, comprise: glass substrate, grid line, gate electrode, first insulation course, active layer, doped layer, second insulation course, source electrode, drain electrode, and pixel electrode wherein are followed successively by first insulation course, active layer and doped layer on gate electrode and the grid line; First insulation course, active layer and the doped layer of gate electrode and its top form the grid island jointly; Second insulation course covers glass substrate, grid line and grid island periphery position; Source electrode and data line are that one is positioned at second insulation course top and the below has the pixel electrode material layer simultaneously, and the source electrode links to each other with doped layer on the gate electrode at grid island peripheral position; Pixel electrode is positioned at second insulation course top; Drain electrode one end links to each other with the doped layer on the gate electrode, and the other end is overlapped on the pixel electrode.
Wherein, described grid line and gate electrode are the monofilm of AlNd, Al, Cu, Mo, MoW or Cr, perhaps the composite membrane that is constituted for AlNd, Al, Cu, Mo, MoW and Cr combination in any.Described first insulation course or second insulation course are the monofilm of SiNx, SiOx or SiOxNy, perhaps are the composite membrane that SiNx, SiOx and SiOxNy combination in any are constituted.The monofilm of described source electrode, data line or leak electricity very Mo, MoW or Cr, the perhaps composite membrane that is constituted for Mo, MoW and Cr combination in any.
To achieve these goals, the present invention provides a kind of manufacture method of pixel structure for thin film transistor liquid crystal display simultaneously, comprising:
Step 1 deposits the grid metal level successively on the substrate of cleaning, first insulation course, and active layer, doped layer adopts first mask plates to carry out mask, expose and carry out etching, obtains grid island figure and grid line;
Step 2, deposition second insulation course and pixel electrode layer adopt second mask plates to carry out mask, expose and carry out etching on completing steps one substrate, obtain the pixel electrode layer of pixel electrode and data line below;
Step 3, sedimentary origin leaks metal level on the substrate of completing steps two, adopt three mask plates, this mask plate is the gray mask plate, define with exposure imaging after obtain not having the photoresist zone, reserve part photoresist zone and the whole photoresists of reservation zone, the zone that keeps whole photoresists comprises pixel electrode area; Reserve part photoresist zone comprises data line zone, source electrode zone and drain electrode zone; Other parts are no photoresist zone; Etching does not have the photoresist zone and obtains the thin film transistor channel part; After finishing etching, photoresist is carried out cineration technics, all remove the photoresist in reserve part photoresist zone, remove the photoresist in the whole photoresists of the reservation zone of a part of thickness; Then deposit one deck passivation layer, and in conjunction with liftoff stripping technology, peel off the photoresist that remains, passivation layer of deposition is also removed thereupon on it, and exposes the source leakage metal level of pixel electrode top; At last, metal level is leaked in the source that exposes carry out etching, obtain pixel electrode.
Wherein, described etching does not have the photoresist zone and obtains thin film transistor channel and comprise that partly the source leaks the etching of metal level etching and channel doping layer.
The present invention is leaked metal level and raceway groove with respect to prior art owing to utilize Gray Tone mask to form the source; Simultaneously use liftoff peeling off (Lift-off) technology to form the passivation layer figure cleverly, realized that the third photo etching mask forms thin-film transistor structure and method, improved the feasibility of technology, saved the cost of array processes simultaneously and account for the machine time raising production capacity.
Below in conjunction with the drawings and specific embodiments the present invention is further illustrated in more detail.
Description of drawings
Fig. 1 a is figure after first mask photoetching of the present invention;
Fig. 1 b is Fig. 1 a channel part A-A ' cross section figure behind first mask exposure of the present invention;
Fig. 1 c is Fig. 1 a channel part A-A ' cross section figure after first mask etching of the present invention and the photoresist lift off;
Fig. 2 a is second mask photoetching of the present invention back plane figure;
Fig. 2 b is Fig. 2 a raceway groove B-B ' cross section figure behind second mask exposure of the present invention;
Fig. 2 c is the unstripped Fig. 2 a of photoresist raceway groove B-B ' cross section figure after second mask etching of the present invention;
Fig. 2 d is Fig. 2 a raceway groove B-B ' cross section figure after second mask etching of the present invention and the photoresist lift off;
Fig. 3 a is figure after the 3rd gray mask version photoetching of the present invention;
Fig. 3 b is Fig. 3 a raceway groove C-C ' cross section figure after the etching of no photoresist zone, the 3rd gray mask version exposure of the present invention back;
Fig. 3 c is for the exposure of the 3rd gray mask version of the present invention, to after the regional etching of no photoresist, carries out Fig. 3 a raceway groove C-C ' cross section figure behind the photoresist ashing;
Fig. 3 d is for behind the present invention the 3rd exposure of gray mask version, etching and photoresist ashing, carries out Fig. 3 a raceway groove C-C ' cross section figure after the passivation layer deposition;
After Fig. 3 e is the present invention the 3rd exposure of gray mask version, etching, photoresist ashing and passivation layer deposition, Fig. 3 a raceway groove C-C ' cross section figure after the photoresist lift off;
Fig. 3 f is for after the present invention the 3rd exposure of gray mask version, etching, photoresist ashing, passivation layer deposition and photoresist lift off, carries out the source and leaks metal and become Fig. 3 a raceway groove C-C ' cross section figure after the etching.
Mark among the figure: 20, substrate; 21, grid metal level; 22, first insulation course; 23, active layer; 24, doped layer; 25, the photoresist of photoetching for the first time figure; 26, second insulation course; 27, pixel electrode layer; 28, the photoresist of photoetching for the second time figure; 29, metal level is leaked in the source; 30, the complete reserve area of photoresist; 31, photoresist part reserve area; 32, passivation layer.
Embodiment
The invention provides a kind of pixel structure for thin film transistor liquid crystal display, comprise parts such as substrate, grid line, gate electrode, first insulation course, active layer, doped layer, second insulation course, source electrode, drain electrode, pixel electrode and passivation layer, these ingredients and prior art do not have difference, and other is characterised in that itself and dot structure phase region of the prior art: be followed successively by first insulation course, active layer and doped layer on gate electrode and the grid line; First insulation course, active layer and the doped layer of gate electrode and its top form the grid island jointly; Second insulation course covers glass substrate, grid line and grid island periphery position; Source electrode and data line are that one is positioned at second insulation course top and the below has the pixel electrode material layer simultaneously, and the source electrode links to each other with doped layer on the gate electrode at grid island peripheral position; Pixel electrode is positioned at second insulation course top; Drain electrode one end links to each other with the doped layer on the gate electrode, and the other end is overlapped on the pixel electrode.
Grid line of the present invention and gate electrode can be the monofilm of AlNd, Al, Cu, Mo, MoW or Cr, perhaps are one of AlNd, Al, Cu, Mo, MoW or Cr or composite membrane that combination in any constituted.
The present invention's first insulation course or second insulation course can be the monofilm of SiNx, SiOx or SiOxNy, perhaps are one of SiNx, SiOx or SiOxNy or composite membrane that combination in any constituted.
The monofilm of source of the present invention electrode, data line or leak electricity very Mo, MoW or Cr perhaps is one of Mo, MoW or Cr or composite membrane that combination in any constituted.
The present invention provides this one pixel structure process method simultaneously, comprising:
Step 1 deposits the grid metal level successively on the substrate of cleaning, first insulation course, and active layer, doped layer adopts first mask to carry out mask, expose and carry out etching, obtains grid island figure and grid line;
Step 2, deposition second insulation course and pixel electrode layer adopt second mask to carry out mask, expose and carry out etching on completing steps one substrate, obtain the pixel electrode layer of pixel electrode and data line below.
Step 3, sedimentary origin leaks metal level on the substrate of completing steps two, adopts three mask plates, and promptly the gray mask plate defines, and obtains not having the photoresist zone through behind the exposure imaging, reserve part photoresist zone and the whole photoresists of reservation zone; Wherein, the zone that keeps whole photoresists comprises the formation pixel electrode area; Reserve part photoresist zone comprises formation data line zone, source electrode zone and drain electrode zone; Other parts are no photoresist zone.Etching does not have the photoresist zone and obtains the thin film transistor channel part, and this partial etching comprises the etching of source leakage metal level etching and channel semiconductor doped layer; After finishing etching, photoresist is carried out cineration technics, all remove the photoresist in reserve part photoresist zone, remove the photoresist in the whole photoresists of the reservation zone of a part of thickness; Then deposit one deck passivation layer, and in conjunction with stripping technology, peel off the photoresist that remains, passivation layer of deposition is also removed thereupon on it, and exposes the source leakage metal level of pixel electrode top; At last, metal level is leaked in the source that exposes carry out etching, obtain pixel electrode.
Below in conjunction with accompanying drawing one pixel structure process method of the present invention is described in detail, shown in Fig. 1 a to Fig. 3 f,
At first, deposition grid metal 21 (Mo, Al/Nd, Cu etc.) on the glass substrate 20 of cleaning, deposition ground floor insulation course 22 (SiNx) on the grid metal, deposition active layer 23 on the ground floor insulation course, and then dopant deposition layer 24 (n-Si or p-Si); Adopt first mask plates to carry out mask and exposure formation photoetching for the first time photoresist glue pattern 25, carry out etching then and obtain grid island figure (gate electrode) and grid line, shown in Fig. 1 a, Fig. 1 b, Fig. 1 c.
Then, deposit second insulation course 26, and on second layer insulation course 26 pixel deposition electrode layer 27 (tin indium oxide etc.), adopt second mask plates to carry out mask and exposure formation photoetching for the second time photoresist figure 28, carry out the pixel electrode layer of the figure below of etching formation pixel electrode and data line, shown in Fig. 2 a, Fig. 2 b, Fig. 2 c and Fig. 2 d.
Then, sedimentary origin leaks metal level 29 (Mo, MoW or Cr etc.), utilize three mask plates, be that gray tone (Gray Tone) mask carries out mask and exposure, shown in Fig. 3 a, formed the thickness figure of different photoresists in this technology, wherein complete reserve area 30 photoresists of photoresist are thicker, and it is corresponding to forming the pixel electrode position; Photoresist part reserve area 31 photoresists are thinner, and it is corresponding to forming data line, source electrode and drain electrode part; Other parts are no photoresist zone.The etching of not having the photoetching zone then obtains the thin film transistor channel part, and this partial etching comprises the etching of source leakage metal level etching and channel semiconductor doped layer, shown in Fig. 3 b; Carry out photoresist ashing technology subsequently, the photoresist of photoresist part reserve area 31 parts is removed, shown in Fig. 3 c, the photoresist attenuation of the complete reserve area of photoresist simultaneously; Then carry out the deposition of passivation layer 32, shown in Fig. 3 d; And, peel off the photoresist that remains in conjunction with liftoff stripping technology, passivation layer of deposition is also removed thereupon on it, and exposes the source leakage metal level of pixel electrode top, shown in Fig. 3 e; At last, metal level is leaked in the source that exposes carry out etching, obtain pixel electrode, shown in Fig. 3 f.
It should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art should can use different materials and equipment to realize it as required, promptly can make amendment or be equal to replacement, and not break away from the spirit and scope of technical solution of the present invention technical scheme of the present invention.

Claims (6)

1, a kind of pixel structure for thin film transistor liquid crystal display, comprise: glass substrate, grid line, gate electrode, first insulation course, active layer, doped layer, second insulation course, source electrode, drain electrode, and pixel electrode is characterized in that: be followed successively by first insulation course, active layer and doped layer on gate electrode and the grid line; First insulation course, active layer and the doped layer of gate electrode and its top form the grid island jointly; Second insulation course covers glass substrate, grid line and grid island periphery position; Source electrode and data line are that one is positioned at second insulation course top and the below has the pixel electrode material layer simultaneously, and the source electrode links to each other with doped layer on the gate electrode at grid island peripheral position; Pixel electrode is positioned at second insulation course top; Drain electrode one end links to each other with the doped layer on the gate electrode, and the other end is overlapped on the pixel electrode.
2, dot structure according to claim 1 is characterized in that: described grid line and gate electrode are the monofilm of AlNd, Al, Cu, Mo, MoW or Cr, perhaps the composite membrane that is constituted for AlNd, Al, Cu, Mo, MoW and Cr combination in any.
3, dot structure according to claim 1 is characterized in that: described first insulation course or second insulation course are the monofilm of SiNx, SiOx or SiOxNy, perhaps are the composite membrane that SiNx, SiOx and SiOxNy combination in any are constituted.
4, dot structure according to claim 1 is characterized in that: the monofilm of described source electrode, data line or leak electricity very Mo, MoW or Cr, the perhaps composite membrane that is constituted for Mo, MoW and Cr combination in any.
5, a kind of manufacture method of pixel structure for thin film transistor liquid crystal display is characterized in that, comprising:
Step 1 deposits the grid metal level successively on the substrate of cleaning, first insulation course, and active layer, doped layer adopts first mask plates to carry out mask, expose and carry out etching, obtains grid island figure and grid line;
Step 2, deposition second insulation course and pixel electrode layer adopt second mask plates to carry out mask, expose and carry out etching on completing steps one substrate, obtain the pixel electrode layer of pixel electrode and data line below;
Step 3, sedimentary origin leaks metal level on the substrate of completing steps two, adopt three mask plates, this mask plate is the gray mask plate, define with exposure imaging after obtain not having the photoresist zone, reserve part photoresist zone and the whole photoresists of reservation zone, the zone that keeps whole photoresists comprises pixel electrode area; Reserve part photoresist zone comprises data line zone, source electrode zone and drain electrode zone; Other parts are no photoresist zone; Etching does not have the photoresist zone and obtains the thin film transistor channel part; After finishing etching, photoresist is carried out cineration technics, all remove the photoresist in reserve part photoresist zone, remove the photoresist in the whole photoresists of the reservation zone of a part of thickness; Then deposit one deck passivation layer, and in conjunction with liftoff stripping technology, peel off the photoresist that remains, passivation layer of deposition is also removed thereupon on it, and exposes the source leakage metal level of pixel electrode top; At last, metal level is leaked in the source that exposes carry out etching, obtain pixel electrode.
6, manufacture method according to claim 5 is characterized in that: described etching does not have the photoresist zone and obtains the etching that thin film transistor channel partly comprises source leakage metal level etching and channel doping layer.
CNB2006101038660A 2006-08-04 2006-08-04 Thin-film transistor LCD pixel structure and manufacturing method therefor Active CN100449392C (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
CNB2006101038660A CN100449392C (en) 2006-08-04 2006-08-04 Thin-film transistor LCD pixel structure and manufacturing method therefor
JP2007203388A JP4740203B2 (en) 2006-08-04 2007-08-03 Thin film transistor LCD pixel unit and manufacturing method thereof
US11/834,118 US7916230B2 (en) 2006-08-04 2007-08-06 Thin film transistor-liquid crystal display having an insulating layer exposing portions of a gate island
KR1020070078570A KR100865451B1 (en) 2006-08-04 2007-08-06 TFT LCD pixel unit and manufacturing method thereof
US13/069,767 US8040452B2 (en) 2006-08-04 2011-03-23 Manufacturing method for a thin film transistor-liquid crystal display having an insulating layer exposing portions of a gate island
US13/273,460 US8289463B2 (en) 2006-08-04 2011-10-14 Manufacturing method for a thin film transistor-liquid crystal display having an insulating layer exposing portions of a gate island

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CNB2006101038660A CN100449392C (en) 2006-08-04 2006-08-04 Thin-film transistor LCD pixel structure and manufacturing method therefor

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CN100449392C true CN100449392C (en) 2009-01-07

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CN113867043B (en) * 2020-06-30 2023-01-10 京东方科技集团股份有限公司 Light-emitting substrate, preparation method thereof and display device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5474941A (en) * 1990-12-28 1995-12-12 Sharp Kabushiki Kaisha Method for producing an active matrix substrate
US6376288B1 (en) * 2001-02-27 2002-04-23 Hannstar Display Corp. Method of forming thin film transistors for use in a liquid crystal display
US20040263742A1 (en) * 2003-06-27 2004-12-30 Lg.Philips Lcd Co., Ltd. Liquid crystal display device and method of fabricating the same
CN1585088A (en) * 2003-08-21 2005-02-23 广辉电子股份有限公司 Producing method for thin-film transistor array baseplate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5474941A (en) * 1990-12-28 1995-12-12 Sharp Kabushiki Kaisha Method for producing an active matrix substrate
US6376288B1 (en) * 2001-02-27 2002-04-23 Hannstar Display Corp. Method of forming thin film transistors for use in a liquid crystal display
US20040263742A1 (en) * 2003-06-27 2004-12-30 Lg.Philips Lcd Co., Ltd. Liquid crystal display device and method of fabricating the same
CN1585088A (en) * 2003-08-21 2005-02-23 广辉电子股份有限公司 Producing method for thin-film transistor array baseplate

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