CN100342647C - Circuit for positive power source inputting load electrifying slow starting - Google Patents

Circuit for positive power source inputting load electrifying slow starting Download PDF

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CN100342647C
CN100342647C CN 200410039885 CN200410039885A CN100342647C CN 100342647 C CN100342647 C CN 100342647C CN 200410039885 CN200410039885 CN 200410039885 CN 200410039885 A CN200410039885 A CN 200410039885A CN 100342647 C CN100342647 C CN 100342647C
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connected
resistor
input
power supply
positive power
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CN 200410039885
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CN1674438A (en
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梅忠岗
马金永
张惠浩
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华为技术有限公司
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Abstract

本发明提供一种正电源输入负载上电缓启动的电路,以克服现有技术中存在的上电时间难于控制的缺点,所述电路与正电源的输入正极和输入负极连接,所述电路包括:第一电容,连接在电源输入正极和电源输入负极之间,用于储能;第一电阻,一端与电源输入正极相连;稳压管,一端与所述第一电阻相连;第二电阻,一端与稳压管相连,另一端与电源输入负极相连;第二电容,与所述第二电阻并联;第三电阻,一端与电源输入正极相连;第四电阻,与所述第三电阻串联;三极管,为NPN型三极管,其基级B连接在所述稳压管和所述第二电阻之间,发射极E与电源输入负极相连,集电极C与所述第四电阻相连;MOS管,为P沟道MOS管,其源极S极与电源输入正极相连,漏极D极与电源输出正极相连,栅极G极与所述第三电阻和第四电阻的串连节点相连。 The present invention provides a positive power supply circuit for a load current input of the slow start, the power-on time to overcome the shortcomings present in the prior art are difficult to control, the positive input of the positive power supply circuit and an input connected to the negative electrode, said circuit comprising : a first capacitor connected between the positive power input and the negative power input, used for storing energy; a first resistor having an end connected to the positive power supply input; regulator, one end connected to the first resistor; a second resistor, One end of the regulator and the other end connected to the negative power supply input; a second capacitor, connected in parallel with the second resistor; a third resistor having an end connected to the positive power supply input; a fourth resistor, in series with the third resistor; transistor, an NPN type transistor, whose base is connected between the B stage regulator and said second resistor, an emitter E is connected to the negative power supply input connected to the collector C of the fourth resistor; the MOS tube, a P-channel MOS transistor, its source electrode S is connected to the positive power supply input, a drain electrode D connected to the positive power output, the gate electrode G is connected to the series node of the third resistor and the fourth resistor.

Description

一种正电源输入负载上电缓启动的电路 A positive power input buffer circuit electrically activated load

技术领域 FIELD

本发明涉及电子领域的电源技术,具体指一种正电源输入负载上电缓启动的电路。 The present invention relates to power electronics technology, and specifically refers to an electric load circuit power input slow start timing.

背景技术 Background technique

在电子设备的工作过程中,负载端为保证工作电源稳定和正常工作,一般情况下都并联有一定容量的滤波电容。 During operation of the electronic device, the load side in order to ensure the power supply stability and normal operation, there are some parallel capacitance filter capacitor in general. 上电过程中从电源输入端吸收大量的瞬间电流,需要输入电源能够提供较大的瞬间电流以便建立负载电压。 During power absorbed a large amount of transient current from the power supply input terminal, the input power needs to be able to provide a large transient current in order to establish the load voltage. 但是,过大的瞬间电流也会造成一些问题,如:容易烧毁输入端串连的保险丝、多次热插拔的情况下负载电压不稳定、电源多负载情况下要求输入电源提供较大容量以及输入电源电压跌落情况下容易造成各负载不能正常工作等。 However, an excessive inrush current may also cause some problems, such as: easy to burn input fuse in series, the load voltage instability case of multiple hot-swappable, where the power requirements of a multi-load input power to provide greater capacity and line input voltage drops in each case is likely to cause the load can not work properly and so on.

可见,如何保证电子设备在上电过程中,各个负载正常有序的上电,同时减少上电过程中的冲击电流是业界需解决的问题,为解决上述问题业界现有技术中常在负载和电源输入端之间采取控制上电顺序和控制上电冲击电流的相关措施,其中,上电缓启动是其中一项比较关键的措施。 Visible, how to ensure that the electronic device is powered on during the normal and orderly power on each load, while reducing the impact on the electric current in the process industry is the need to solve problems, to solve the above problems of the prior art often in industry and power load take the power-up sequence and the impact of control measures on the control current between the input terminal, which, on the power slow start is one of the more critical measures.

在现有的正电源缓启动的方法中,常常用在输入电源和负载间串连电感,以达到上电缓启动的作用。 In the conventional method of the positive power source slow start, it is often used in a series inductance between the input supply and the load acting on the power to achieve the slow start.

但是,仅仅利用串连电感来使上电缓启动,却存在如下缺点:由于电感器件参数的差异较大,所以现有技术中存在上电时间难于控制的缺点;由于串连电感存在电流不能突变的特性,所以持续给负载充电,所以现有技术中存在后级负载电压有较大过冲的缺点;由于串连了电感,负载电源动态响应较差,当前极电压发生瞬间跌落的情况下,由于电感阻止电流的突变,将造成后极负载电压跌落。 However, using only an inductor in series to power up the slow start, has the following disadvantages: due to differences in inductive device parameter is large, power-up time difficult to control the disadvantages present in the prior art; not due to mutations in the current series inductance the characteristics, continuous charge to the load, the prior art present the disadvantage stage load voltage is greater overshoot; as series inductance, poor load power dynamic response, the current instantaneous voltage drop occurs in the case, Since the inductor current blocking mutations will cause the load voltage drop electrode. 所以在现有技术中当电源电压跌落时将导致负载瞬间电压过低,进而使负载发生故障,不能正常地工作。 Therefore, in the prior art when the power supply voltage drops too low will cause the load transient voltage, and thus the load fails, does not work properly.

发明内容 SUMMARY

本发明目的在于提供一种正电源输入负载上电缓启动的电路,以克服现有技术中存在的上电时间难于控制的缺点。 Object of the present invention to provide an electrical circuit of a positive-power supply input buffer on the load starts, the power to overcome the shortcomings in the prior art the time difficult to control.

为解决上述问题,本发明提供如下的技术方案:一种正电源输入负载上电缓启动的电路,所述电路与正电源的输入正极和输入负极连接,所述电路包括:第一电容,连接在电源输入正极和电源输入负极之间,用于储能;第一电阻,一端与电源输入正极相连;稳压管,一端与所述第一电阻相连;第二电阻,一端与稳压管相连,另一端与电源输入负极相连;第二电容,与所述第二电阻并联;第三电阻,一端与电源输入正极相连;第四电阻,与所述第三电阻串联;三极管,为NPN型三极管,其基级B连接在所述稳压管和所述第二电阻之间,发射极E与电源输入负极相连,集电极C与所述第四电阻相连;MOS管,为P沟道MOS管,其源极S极与电源输入正极相连,漏极D极与电源输出正极相连,栅极G极与所述第三电阻和第四电阻的串连节点相连。 To solve the above problems, the present invention provides the following technical solution: A positive power supply input on the slow start of the electrical load circuit, the power supply circuit and the positive input of the positive electrode and the negative input is connected, said circuit comprising: a first capacitor connected between the positive power input and the negative power input, used for storing energy; a first resistor having an end connected to the positive power supply input; regulator, one end connected to the first resistor; a second resistor connected to one end of regulator the other end is connected to the negative power supply input; a second capacitor, connected in parallel with the second resistor; a third resistor having an end connected to the positive power supply input; a fourth resistor, in series with the third resistor; transistor, an NPN type transistor , whose base is connected between the B stage regulator and said second resistor, an emitter E is connected to the negative power supply input connected to the collector C of the fourth resistor; MOS transistor, a P-channel MOS transistor , its source electrode S is connected to the positive power supply input, a drain electrode D connected to the positive power output, the gate electrode G is connected to the series node of the third resistor and the fourth resistor.

所述电路还包括:第三电容,连接在电源输出正极和电源输出负极之间,用于旁路高频干扰信号。 Said circuit further comprises: a third capacitor connected between a positive power supply output and a negative power output, a bypass for high frequency interference signals.

所述第三电容为高频滤波电容。 The third high-frequency filter capacitor capacitance.

所述电路还包括:第四电容,连接在电源输出正极和电源输出负极之间,为负载储能滤波电容。 Said circuit further comprising: a fourth capacitor connected between the positive power supply output and the negative power output, load capacitor energy storage filter.

所述电路还包括:第五电容,与所述第三电阻并联。 Said circuit further comprising: a fifth capacitor in parallel with the third resistor.

通过上述的技术方案,本发明具有如下优点:1、由于设计了上电延时缓启动控制电路以及储能电容C1的作用,可以方便调节负载上电时间,保证电源后级负载正常建立工作电压所需要的瞬态电流,有效降低负载上电瞬间所产生的冲击电流。 Through the above technical solution, the present invention has the following advantages: 1, due to the design of the electrical control circuit and a soft start delayed storage action of capacitor C1, can easily adjust the load on the power-up time, to ensure the establishment of the normal load level power supply voltage transient current needed to effectively reduce the impact on the instantaneous electrical load current is generated.

2、由于该电路设计了储能电容,以及上电延时缓启动电路的工作作用下,可以有效提高发生输入电源电压跌落情况下负载正常工作的可靠性。 2, since the circuit design of the energy storage capacitor, and the slow start working electrical delay circuit acts can occur effectively improve the reliability of the load input supply voltage in the case of normal operation dropped.

3、由于储能电容C1的储能作用,以及延时电路延时作用,另外由于MOS管开通特性决定了负载在输入电源电压建议以后才上电,所需的瞬间能量可以通过输入电源和储能电容共同提供,可以降低电子设备对电源容量的要求。 3, due to the storage effect of the storage capacitor C1, a delay circuit and a delayed action, since the MOS transistor further opened after the load characteristics determine the input power supply voltage is recommended before, the moment the energy required by the input power and the reservoir capacitor can collectively provide, the electronic device may reduce power requirements of capacity.

4、由于MOS管导通过程中的阻抗变化特性,同时本缓启动延时控制电路是由电容和电阻以及三极管的特性决定,输出电压不会产生过冲。 4, since the change in characteristic impedance MOS transistor during conduction, while the present soft start control circuit is a delay determined by the capacitance and resistance characteristics of the transistor and the output voltage does not overshoot.

附图说明 BRIEF DESCRIPTION

图1为本发明具体实施例正电源输入负载上电缓启动的电路的结构图。 Example 1 FIG configuration diagram positive power input circuit of the load current slow start a specific embodiment of the present invention.

具体实施方式 Detailed ways

在具体介绍本发明具体实施例前,先对专用术语作一介绍:MOS:Metal-oxide semiconductor:金属氧化物半导体;FET:Field Effect Transistor:场效应管;P沟道MOS管:Positive Channel Metal Oxide Semiconductor FET:P沟道金属氧化物半导体场效应晶体管,所述的P沟道MOS管是一种高输入阻抗、低开关速度及低功耗的半导体器件;上电冲击电流:负载上电过程中建立正常工作电压从输入端所吸收的瞬间电流;上电顺序控制:由于电源多负载情况下,为保证各负载要求的不同上电工作顺序所采取的控制措施;电压跌落:在系统中某点电压突然降低,经过一段时间后(从几毫秒到几秒范围内)电压恢复正常。 Before particular embodiments described particular embodiments of the present invention, to make a description of the specific terms: MOS: Metal-oxide semiconductor: metal oxide semiconductor; FET: Field Effect Transistor: field effect transistor; P-channel MOS transistor: Positive Channel Metal Oxide semiconductor FET: P-channel metal oxide semiconductor field effect transistor, said MOS transistor is a P-channel semiconductor device of high input impedance, low switching speed and low power consumption; the electric shock current: load power during establish instantaneous current normal operating voltage absorbed from the input terminal; power-up sequencing: Since the power supply multiple loads case, in order to ensure control measures on electric operational order different from the respective load requirements taken; voltage drop: in the system at a point sudden voltage decrease, after a period of time (from a few milliseconds to several seconds range) voltage returns to normal.

请参考图1,本发明具体实施例正电源输入负载上电缓启动的电路,所述的电路连接在正电源的输入正极+VIN和输入负极GND之间,所述的正电源输入负载上电缓启动电路包括:电容C1,所述的电容C1连接在电源的输入正极+VIN和输入负极GND之间,起储能作用;电阻R1,所述的电阻R1一端连接在电源输入正极+VIN上;稳压管D1,所述的稳压管D1一端与所述的电阻R1相连;电阻R2,所述的电阻R2一端与稳压管D1相连,另一端连接在电源输入负极GND上;电容C2,所述的电容C2并联在电阻R2的两端;电阻R3,所述的电阻R3一端连接在电源输入正极+VIN上;电阻R4,所述的电阻R4和所述的电阻R3相串连;三极管Q1,所述三极管Q1为NPN型三极管,其基级B连接在所述的稳压管D1和所述的电阻R2的串联节点上,所述三极管Q1的发射极E连接在电源输入负极GND上,所述三极管Q1的集电级C与所 Referring to FIG 1, a positive power input circuit example slow start load current specific embodiment of the present invention, the input circuit is connected between the positive and negative input GND + VIN of the positive power source, the positive power supply input of the power load slow start circuit comprising: a capacitor C1, the capacitor C1 is connected between the positive input and negative input GND + VIN power, play the role of storage; the resistor R1, the resistor R1 is connected to one end of the positive power source + VIN on the input ; zener diode D1, the zener diode D1 and one end of the resistor R1 is connected; resistor R2, the resistor R2 is connected to one end of the zener diode D1, and the other end connected to the GND negative power supply input; capacitor C2 the capacitor C2 is connected in parallel to the resistor R2; the resistor R3, the resistor R3 has one end connected to the positive power supply input + VIN; resistor R4, and the resistor R4 to the resistor R3 in series with; transistor Q1, the transistor Q1 is a NPN transistor, whose base is connected to the stage B of the zener diode D1 and a series of node of the resistor R2, the emitter of the transistor Q1 is connected to the power input E GND negative , the collector of the transistor Q1 to the level of C 的电阻R4相连;MOS管Q2,所述MOS管Q2为P沟道MOS管,其源极S极连接到电源的输入正极+VIN上,漏极D极连接到电源输出正极+VOUT上,栅极G极连接到所述电阻R3和电阻R4的串连节点上;电容C4,所述的电容C4为高频滤波电容,其连接在电源的输出正极+VOUT和输出负极GND之间,作用为:旁路高频干扰信号;电容C3,为负载储能滤波电容,也连接在电源的输出正极+VOUT和输出负极GND之间,负载连接在所述电源的输出正极+VOUT和输出负极GND之间,获得电源供应。 Resistor R4 is connected; MOS transistor Q2, on the MOS transistor Q2 is a P-channel MOS transistor, the source S is connected to the positive power supply input + the VIN, the drain electrode D is connected to the positive power supply + the output VOUT, the gate electrode G is connected to the series node of the resistors R3 and R4; and the capacitor C4, the capacitor C4 is a high frequency filter capacitor connected between the output of the positive power source + VOUT and the GND output negative, role : bypass high-frequency interference signals; capacitor C3, the load capacitor energy storage filter, power output is also connected to the positive output and a negative electrode between the + VOUT GND, GND of the load connected to the negative output and positive output + VOUT of the power supply Room gets its power supply.

所述的电阻R1和R2及稳压管D1起分压作用,当电源输入电压超过所述稳压管D1的稳压值以后,电源便开始通过所述的电阻R1、稳压管D1给所述的电容C2充电,由于所述的电阻R2、稳压管D1及电阻R1串连,所述的电容C2和电阻R2并联,所以充电的时间T1的计算方法为:T1=C2*R1*R2/(R1+R2);而在电源掉电时的放电时间T2的计算方法为:T2=R2*C2。 The resistors R1 and R2 and zener diode D1 from voltage division, when the power supply after the input voltage exceeds the voltage value of the zener diode D1, the power supply began through the resistor R1, the zener diode D1 to the said charging capacitor C2, since the resistor R2, the zener diode D1 and the resistor R1 connected in series, the resistor R2 and the capacitor C2 in parallel, the charging time is calculated T1: T1 = C2 * R1 * R2 / (R1 + R2); and the discharge time of the power down is calculated T2: T2 = R2 * C2. 另外,由于三极管Q1的基极B和发射极E的电压在超过0.6V时将导通,所以所述电容C2的电压被钳制在0.6V以内。 Further, since the transistor Q1 base B and emitter E is turned on when the voltage exceeds 0.6V, the voltage of the capacitor C2 is clamped within 0.6V.

所述的电阻R3和电阻R4为MOS管Q2和电源输入负极GND之间的分压电阻,所述P沟道MOS管Q2的Vgs电压(Vgs为MOS管栅源极电压差)为负并超过一定的数值以后MOS管Q2将导通,所以通过选取所述电阻R3和电阻R4的分压值可以保证三极管Q1导通以后P沟道MOS管Q2正常导通工作。 The resistor R3 and the resistor R4 of the voltage dividing resistors between the input MOS transistor Q2 and the negative power supply GND, Vgs voltage of the P-channel MOS transistor Q2 (Vgs of the MOS transistor gate-source voltage difference) is negative and exceeds after a certain value of the MOS transistor Q2 is turned on, by selecting the values ​​of the voltage dividing resistor R3 and the resistor R4 ensures that transistor Q1 is turned on after the P-channel MOS transistor Q2 is turned on work properly. 另外,为延迟MOS管Q2的导通时间,还可以在S极和G极之间(即电阻R3两端)并联一个电容(图未示)。 Further, MOS transistor Q2 is the delay time of conduction, also between the poles and S poles G (i.e. across resistor R3) in parallel with a capacitor (not shown).

上电过程中,由于电容C1的储能作用,输入电源电压逐渐上升,当电容C1两端的电压超过稳压二极管D1的稳压值以后,通过R1和R2分压以后给电容C2充电;当C2上的电压超过0.6V以后,三极管Q1导通;由于三极管Q1导通,MOS管Q2的栅极G和源极S之间形成压差,用Vgs表示,当Vgs达到MOS管开通的门限电压时,MOS管Q2导通,从而保证了后极和输入电源直接相连,负载开始上电建立工作电压。 During power, since the effect of the storage capacitor C1, the input power supply voltage is gradually increased, When the voltage across capacitor C1 exceeds the Zener voltage of diode D1, by dividing R1 and R2 after charging the capacitor C2; C2 when after the voltage exceeds 0.6V, the transistor Q1 is turned on; as a pressure differential between the transistor Q1 is turned on, the gate G of the MOS transistor Q2 and the source S, represented by Vgs, Vgs reaches the MOS transistor when the threshold voltage of the turn , the MOS transistor Q2 is turned on, thus ensuring the power input electrode and directly connected to the electrical load starts to establish the operating voltage. 由于MOS管的开通特性决定,MOS管开通的过程中,内部阻抗逐步变化,从高阻抗逐步变化到低阻抗,从而决定了负载上电的特性。 Since the opening characteristics of the MOS transistor is determined, the process of opening of the MOS transistor, the internal impedance changes stepwise, gradually changes from high impedance to low impedance, to determine the electrical characteristics of the load. 同时由于储能电容C1和控制MOS管开通的电路中R1、R2、C2、Q1以及R3和R4的延时作用,保证了MOS管Q2开通过程中,前极输入电源已经建立,负载所需的瞬间电流可以通过输入电源和储能电容C1共同提供,从而保证了负载电压的正常建立。 And because the storage capacitor C1 and a control circuit in the opening of the MOS transistor R1, R2, C2, Q1, and R3 and R4 delayed action to ensure that the process of the MOS transistor Q2 is turned on, the input power before the electrode has been established, the required load instantaneous current may be provided through a common input power source and the energy storage capacitor C1, so as to ensure the establishment of the normal load voltage. 由于负载电压是在输入电源电压建立后延时建立的,所以该控制电路起到了控制负载缓启动的作用。 Since the load voltage is a supply voltage input to establish the delay established, the control circuit acts to control the load of the slow start.

由于储能电容C1的储能作用,当输入电源电压发生跌落的时候,负载所需的能量可以通过储能电容C1维持,所需能量,可以通过改变电容C1的容量实现。 Due to the storage effect of the storage capacitor C1, when the input supply voltage drop occurs, the energy required for the load can be maintained by the energy storage capacitor C1, the required energy can be achieved by changing the capacity of the capacitor C1. 计算的公式如下:C1=2PT/(V1*V1-V2*V2),其中P表示负载功率,T表示预计需承受的电源电压跌落时间长度,V1表示负载在输入电源跌落瞬间的电压,V2表示负载正常工作所需维持的最低安全工作电压。 Calculated as follows: C1 = 2PT / (V1 * V1-V2 * V2), where P represents the load power, T is expected to take to withstand a supply voltage drop length of time, V1 represents a load drop momentary voltage on the input power, V2 represents normal work load required to maintain a minimum safe operating voltage. 由于储能电容C1的储能特性可以提高负载在电源电压跌落瞬间的可靠性,另一方面如果电源电压跌落时间过长,超过预计的时间长度,储能电容C1上的电压逐步下降,在延时控制电路的R1、D1、R2、C2、Q1的共同作用下,C1电压下降到一定程度后该控制电路将自动关闭MOS管Q2,保证了输入电源深度跌落后的电源缓启动,从而提高了负载抗电源电压跌落的能力。 Since the energy storage characteristics of the storage capacitor C1 reliability can be improved load transient drop in the supply voltage, on the other hand if the supply voltage drops too long, greater than the expected length of time, the voltage on the energy storage capacitor C1 gradually decreases in the extension after the R1 control circuit, D1, R2, C2, under the action of Q1, a C1 voltage drops to a certain extent, the control circuit will automatically turn off MOS transistor Q2, to ensure that the power delay after the input power source depth drop starts, thereby increasing the anti-load capacity of the power supply voltage drop.

由于所述的电容C1具有储能作用,所以可以保证负载上电时正常建立所需要的时间和正常建立所需要的上电冲击电流。 Since the capacitor C1 has a storage effect, it is possible to ensure the normal build-on time required to establish normal rush current required to power the load.

由于控制了负载的上电延时,可以保证负载在上电过程中所需要的瞬态电流通过储能电容来提供;同时电源也可以适当补充所损失的能量,保证了后级负载电压建立的可靠性和稳定性;同时由于P沟道MOS管组成的缓启动也减少了后级负载的上电冲击电流,保证了前级输入电源模块不发生过流保护。 Since the control of the load on the power-on delay, can ensure that the load current transient during power required by the energy storage capacitor is provided; at the same time the power supply may be appropriate to add the loss of energy to ensure that the load voltage level established reliability and stability; and because the slow start of the P-channel MOS tubes also reduces the power stage after the impact of the load current, to ensure that the input power module is not pre-overcurrent occurs.

电源输入端连接的容量较大的储能电容C1提高了系统在电源电压跌落情况下的可靠性。 Larger capacity of the storage capacitor C1 connected to the input power increases the system reliability in case of power supply voltage drops. 电容C1容量的选取通常按照以下公式进行:C1>2PT/(U1*U1-U2*U2),其中P表示负载功率,T表示跌落时间,U1表示负载正常额定工作电压,U2表示负载所能承受的最低安全工作电压。 Select capacity capacitor C1 is generally carried out according to the following equation: C1> 2PT / (U1 * U1-U2 * U2), where P represents the load power, T represents a fall time, U1 represents a normal load rated voltage, U2 denotes a load can withstand the minimum safe operating voltage.

系统正常工作情况下,当电源发生短时电压跌落,可以通过储能电容C1释放能量保证后级负载正常工作,当电源恢复正常后,系统正常工作。 Under normal system operation, when the power supply voltage drop occurs short, energy may be released by the energy storage capacitor C1 to ensure the normal operation after the stage load, when the power is restored, the system is working properly. 如果电源电压跌落时间过长,储能电容C1上的电压低于电源缓启动电路所设置的电压门限值时,该缓启动电路将关断输出,缓启动电路所设置的门限电压值要高于负载最低安全工作电压。 If the supply voltage drops too long, the voltage on the energy storage capacitor C1 is lower than the gate voltage of the power supply circuit provided in the soft-start value, the slow-start circuit will turn off the output voltage value of the slow start threshold circuit is set to be higher minimum safe operating voltage to the load. 电源正常恢复后,负载的重新正常启动,避免了中间不稳定状态的发生,降低了负载由于输入电压过低所产生的各种故障,提高了负载在电源电压跌落条件下正常工作的可靠性。 After normal power restored, the load start working again, to avoid the occurrence of an intermediate unstable state, load is reduced due to the various faults generated input voltage is too low, increase the reliability of the load condition of the power supply voltage drops working.

由于有储能电容C1可以提高了负载在电源电压发生波动的情况下正常工作的可靠性,所以负载对前级电源输出容量的要求适当降低。 Because energy storage capacitor C1 can improve reliability of the load in the case where the power supply voltage fluctuates work properly, the load due to lower power requirements for the front stage output capacity.

通过上述的技术方案,本发明具有如下优点:1、由于设计了上电延时缓启动控制电路以及储能电容C1的作用,可以方便调节负载上电时间,保证电源后级负载正常建立工作电压所需要的瞬态电流,有效降低负载上电瞬间所产生的冲击电流。 Through the above technical solution, the present invention has the following advantages: 1, due to the design of the electrical control circuit and a soft start delayed storage action of capacitor C1, can easily adjust the load on the power-up time, to ensure the establishment of the normal load level power supply voltage transient current needed to effectively reduce the impact on the instantaneous electrical load current is generated.

2、由于该电路设计了储能电容,以及上电延时缓启动电路的工作作用下,可以有效提高发生输入电源电压跌落情况下负载正常工作的可靠性。 2, since the circuit design of the energy storage capacitor, and the slow start working electrical delay circuit acts can occur effectively improve the reliability of the load input supply voltage in the case of normal operation dropped.

3、由于储能电容C1的储能作用,以及延时电路延时作用,另外由于MOS管开通特性决定了负载在输入电源电压建议以后才上电,所需的瞬间能量可以通过输入电源和储能电容共同提供,可以降低电子设备对电源容量的要求。 3, due to the storage effect of the storage capacitor C1, a delay circuit and a delayed action, since the MOS transistor further opened after the load characteristics determine the input power supply voltage is recommended before, the moment the energy required by the input power and the reservoir capacitor can collectively provide, the electronic device may reduce power requirements of capacity.

4、由于MOS管导通过程中的阻抗变化特性,同时本缓启动延时控制电路是由电容和电阻以及三极管的特性决定,输出电压不会产生过冲。 4, since the change in characteristic impedance MOS transistor during conduction, while the present soft start control circuit is a delay determined by the capacitance and resistance characteristics of the transistor and the output voltage does not overshoot.

Claims (5)

1.一种正电源输入负载上电缓启动的电路,所述电路与正电源的输入正极和输入负极连接,其特征在于,所述电路包括:第一电容,连接在电源输入正极和电源输入负极之间,用于储能;第一电阻,一端与电源输入正极相连;稳压管,一端与所述第一电阻相连;第二电阻,一端与稳压管相连,另一端与电源输入负极相连;第二电容,与所述第二电阻并联;第三电阻,一端与电源输入正极相连;第四电阻,与所述第三电阻串联;三极管,为NPN型三极管,其基级B连接在所述稳压管和所述第二电阻之间,发射极E与电源输入负极相连,集电极C与所述第四电阻相连;MOS管,为P沟道MOS管,其源极S极与电源输入正极相连,漏极D极与电源输出正极相连,栅极G极与所述第三电阻和第四电阻的串连节点相连。 1. A positive power supply input slow start of a load circuit, the power supply circuit and the positive input connected to the positive and negative input, wherein, said circuit comprising: a first capacitor connected between the positive power input and the power input between the negative electrode for an energy storage; a first resistor, one end connected to the positive power supply input; regulator, one end connected to the first resistor; a second resistor connected to one end of the regulator, the other end of the negative power supply input is connected; a second capacitor, connected in parallel with the second resistor; a third resistor having an end connected to the positive power supply input; a fourth resistor, in series with the third resistor; transistor, an NPN type transistor, its base connected to the stage B between the regulator and the second resistor, and the emitter E is connected to the negative power input, a collector C is connected to the fourth resistor; MOS transistor, a P-channel MOS transistor, and its source electrode S power input is connected to the positive electrode, the drain D is connected to the positive power output electrode, the gate electrode G is connected to the series node of the third resistor and the fourth resistor.
2.如权利要求1所述的电路,其特征在于,所述电路还包括:第三电容,连接在电源输出正极和电源输出负极之间,用于旁路高频干扰信号。 2. The circuit according to claim 1, wherein said circuit further comprises: a third capacitor connected between a positive power supply output and a negative power output, a bypass for high frequency interference signals.
3.如权利要求2所述的电路,其特征在于,所述第三电容为高频滤波电容。 3. The circuit according to claim 2, wherein said third capacitance is a high frequency filter capacitor.
4.如权利要求1所述的电路,其特征在于,所述电路还包括:第四电容,连接在电源输出正极和电源输出负极之间,为负载储能滤波电容。 4. The circuit according to claim 1, wherein said circuit further comprises: a fourth capacitor connected between a positive power supply output and the negative power output, load capacitor energy storage filter.
5.如权利要求1至4任一项所述的电路,其特征在于,所述电路还包括:第五电容,与所述第三电阻并联。 5. The circuit according to one of claims 1-4, wherein said circuit further comprises: a fifth capacitor in parallel with the third resistor.
CN 200410039885 2004-03-23 2004-03-23 Circuit for positive power source inputting load electrifying slow starting CN100342647C (en)

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CN101114826B (en) 2007-07-23 2011-05-11 中兴通讯股份有限公司 Power source relaxed starter
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CN103532366A (en) * 2013-09-26 2014-01-22 深圳市三旺通信技术有限公司 Starting method and starting circuit of direct-current power supply
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