CH669476A5 - - Google Patents

Description

DESCRIPTION

This invention relates to a method of manufacturing solid state semiconductor devices, such as photo elements, and enables an improved inexpensive method of manufacturing polycrystalline silicon solar cells in which the defective surface layer generated during the hydrogen passivation acts as an application mask for the final coating steps is used. The inventive method for producing solid-state semiconductor devices, in particular silicon solar cells, is defined in claim 1.

A previously common method for producing silicon solar cells included the steps: formation of a PN junction by diffusing a suitable dopant into the front surface of a silicon wafer or strip, etching a grid electrode pattern into a dielectric protective masking layer formed on that front surface, deposition a nickel coating on all of the silicon exposed by etching, covering the nickel with copper and tin, removing the remainder of the dielectric masking layer from the front surface and forming an anti-reflective coating on the last exposed portions of the front surface.

Although these production steps can be used both in the case of silicon as single crystal and in the case of polycrystalline silicon, it is desirable for cost reasons to produce solar cells from the latter. It is known, however, because of minority carrier losses at grain boundaries, crystal lattice dislocations and the like. the efficiency achieved with polycrystalline silicon solar cells is generally worse than that of monocrystalline cells. This fact has been improved by introducing a monovalent element, such as hydrogen, into the structure that combines with the free bonds associated with the structural defects, thereby minimizing the loss of recombinant minors.

As is known to those skilled in the art, it is an important consideration in determining the cell fabrication sequence that the combination of time and temperature in all steps following hydrogen passivation does not cause hydrogen diffused back into the silicon to diffuse out of the passivated substrate. For example, shown that

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a hydrogen passivated cell, which was exposed to a temperature of 600 ° C for half an hour in a vacuum, loses practically all bound hydrogen and returns to the state before passivation, as its observed current activity induced by an electron beam proves. In this regard, it should be noted that the step of transition diffusion in solar cell manufacturing typically requires temperatures in the order of 900 ° C.

It has also been found that hydrogen passivation normally heats the cell to a temperature high enough to remove base metals, e.g. Copper to make it wander through the junction, causing a "soft" diode or short circuit. For example, C.H. Seager, D.J. Sharp, J.K.G. Panitz and R.V.D. Aiello in the "Journal of Vacuum Science and Technology", Volume 20, No. 3, pages 430-435 (March 1982) showed that the passivation of polycrystalline silicon can be achieved with a Kaufman ion source used to generate a hydrogen Generate ion beam in the kiloelectron volt energy range. Relatively short exposure times (e.g. between 0.5 and 4 min) appear optimal in a range of high ion energy and flux density (e.g. 1 to 3 mA / cm2). Such irradiations generally result in the substrate temperature rising to at least approximately 275 ° C when the substrate is carefully contacted with suitable heat dissipation. Otherwise temperatures above 400 ° C can easily be reached. To avoid a rapid migration of base metals into the silicon matrix, it is important that the temperatures are limited to less than approx. 300 ° C. However, the substrate and heat conductor measures for thermal control during passivation easily become the speed-determining factor in high-output processing with such ion sources. As a result, it is desirable to avoid heat dissipation measures in order to obtain an inexpensive method with high output. In addition, unevenness in the surface of the low-cost silicon strips of the EFG type make heat dissipation difficult.

In addition, hydrogen passivation is most effective when the base silicon surface is exposed. Therefore, any application mask used to define the grid electrode pattern on the front surface should be removed from the passivation or only afterwards.

Accordingly, it is an object of the present invention to provide a processing order for manufacturing solid state semiconductor devices, such as solar cells, in which a hydrogen passivation step is inserted into the structure prior to the introduction of any base metals.

It is a further object of the present invention to insert the hydrogen passivation step in such a way that the passivation of the silicon and nickel silicide lying under the front electrode structure of a partially finished cell is improved.

Yet another object of the present invention is to insert a hydrogen passivation step in the processing of EFG-type silicon strips into solar cells so

that the need for heat dissipation from the substrate during passivation is avoided.

These objects are achieved by the method according to the invention, which in a preferred embodiment, which is applied to the production of silicon solar cells, comprises, among other things, the following steps: (1) Forming a thin grid electrode pattern from nickel (or similar material) the front surface of a silicon strip with a flat transition, (2) hydrogen passivation of the transition side of the cell, (3) sintering together of the nickel with partial formation of a nickel silicide, (4)

Applying additional metal (s) to the metal-covered sections of the cell and (5) coating the exposed silicon surface with an anti-reflective coating. The silicon can then be processed further, e.g. to prepare its connection to electrical circuits.

In an alternative embodiment, heating the sample during passivation provides energy for the nickel sintering step.

These manufacturing sequences have several key properties. First, the applicant has recognized that the hydrogen ions encountered during the hydrogen passivation change the surface of the silicon wafer in such a way that the metal deposition is inhibited by dip coating on the changed surface. Thus, after an initial layer of metal is applied to the substrate, any application mask originally used to delineate the electrode grid pattern for the front surface can be removed. Passivation can now take place on an exposed base silicon layer, the passivation not only improving the electrical performance of the cell, but also serving as a secondary application mask for subsequent dip-coating steps by changing the surface layer. As a result, the passivation of the exposed silicon base can take place before the application of base metals without an additional masking step being required before the metallization by dip coating. The applicant has also found that passivation by thin layers of a metal, such as nickel, is possible. Thus, the silicon and nickel silicide can be passivated under the thin nickel starting coating of the front electrode.

Brief description of the drawing

For a more complete understanding of the present invention, reference should be made to the following detailed description, which should be considered in conjunction with the accompanying drawing which illustrates a number of the stages involved in the manufacture of solar cells in accordance with a preferred form of the invention.

Throughout the drawing, the same reference numbers refer to similar structures.

In the drawing, the thicknesses and depths of the several coatings and areas are neither shown to scale nor exactly according to their relative proportions because of the expediency of the explanation.

With reference to the drawing, the preferred embodiment of the invention relates to the production of solar cells from EFG-produced P-type silicon strips. A partially completed cell 1 is provided as the starting workpiece for this embodiment. The partially completed cell 1 has a substrate 2, which is preferably formed from a P-type silicon strip, the one (hereinafter referred to as the "front") of which has a side with a relatively flat transition 4 (ie a transition which is between approximately 3000 and approximately 7000) Angstrom units is deep), an N-conducting zone 6 and a mask 8 is provided. The mask 8 is made of a material (e.g. a dielectric) to which metals such as nickel adhere poorly, and is shaped so that it forms parts of the front surface of the substrate 2 in a pattern of a multi-finger grid electrode (e.g. an electrode with the U.S. Patent 3,686,036). The other side (hereinafter referred to as “rear side”) of the substrate is preferably provided with a layer 10 of aluminum alloyed with the substrate and a P + zone 12. The P + zone 12 preferably has a depth of approximately 1 to approximately 5 ( in the.

The partially completed cell 1 can be made by any number of means known to those skilled in the art.

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For example, junction 4 and zone 6 can be formed in a P-type silicon substrate 2 by phosphorus diffusion, and mask 8 can be formed on the front surface thereof by photolithography or printing. Layer 10 and P + zone 12 can be made by coating the back of the substrate with a layer of aluminum powder in a volatile organic solvent, such as terpineol, which can be removed by evaporation, comprising aluminum paste and then heating the substrate to remove any volatile or thermally decomposable organic Eliminate constituents of the paste and alloy the aluminum with the substrate and form the P + zone. However, other forms of substrate, junction and rear electrode and other manufacturing methods can be used equally well to provide the partially completed cell 1.

Starting from such a prefabricated workpiece, both sides of the substrate are first coated with nickel, a nickel layer 14 being formed over the entire surface of the aluminum layer 10 on the back of the workpiece by adhesive deposition of nickel, while the adhesive deposition of nickel the front forms a layer 16 directly on the surface of the substrate 2 only on the areas left free by the mask 8.

The nickel layers 14 and 16 can be applied in various ways. It is preferably made by a known electroless or dip coating process, e.g. a dip coating process that is the same as or similar to that described in U.S. Patent 4,321,283 to Kirit Patel et al. As used herein, the term "electroless plating" means coating from a bath containing a reducing agent without using an external electrical field, and the term "dip coating" means a process in which an object is coated with a metal is coated without using an external electric field by immersing it in a coating bath containing no reducing agent and the coating comprising a displacement reaction.

As a previous step, the cleaned silicon substrate surface is preactivated with a suitable agent. This preactivation procedure is desirable because the silicon surface itself often does not maintain the electroless plating process and generally all nickel deposited on an untreated surface adheres poorly to it. Gold chloride is preferably used as the activation agent, although platinum chloride, stannous chloride-palladium chloride or other known activators can be used, e.g. in U.S. Patent 3,489,603. Then both sides of the silicon strip are coated with a nickel layer, preferably by dip coating the strip in an aqueous bath as described in U.S. Patent 4,321,283, or in an aqueous nickel sulfamate and ammonium fluoride bath with a pH of about 2 , 9 at about room temperature for about 2 to 6 min.

At this stage, the mask 8 is removed from the substrate 2. Depending on the type of mask, this can be done in several known ways, for example by means of a buffered etching solution. As a result of the removal of the mask, the front surface of the substrate 2 is exposed in the areas exposed by a lattice pattern formed by the nickel layer 16.

Next, the cell is passivated with hydrogen. A preferred method is to irradiate the front surface of the substrate 2 (and the nickel layer 16) with the hydrogen ion beam from a Kaufman (broad beam) ion source approximately 15 cm from the substrate. This ion source is preferably operated at a pressure of between approximately 20 and 50 million.

Torr (hydrogen), a hydrogen flow rate in the order of about 25 to 40 cm3 (norm) per minute, with a potential of about 1700 V direct current between source and substrate and with a beam current between about 1 and 3 mA / cm2 operated on the substrate. An irradiation time between about 1 and 4 minutes has been found to be suitable both to minimize the minority carrier recombination losses that typically occur with EFG silicon cells (a passivation zone is created which is about 20 to 80 (deep or about 100 times as deep as) Transition 4 is), while at the same time an approximately 200 angstrom unit deep modified surface layer 18 is formed on the irradiated portions of the substrate 2. It has also been found that the use of a mechanical aperture for pulsed scanning of the ion beam in a switching ratio of approximately 50% during the Passivation in the substrate causes a minimal temperature rise.

The exact nature of the modified surface layer 18 is unknown. However, it is believed to be a damaged zone where the crystal structure is somewhat broken, the silicon partially forming SiH or SiH2 with hydrogen from the ion beam, but where the material may be amorphous. A small amount of carbon or one or more hydrocarbons in the vacuum system may be necessary to form the desired modified surface layer. As initially installed, the Kaufman ion source used was fitted with a graphite platen about 5 inches (about 13 cm) in diameter on which the substrates, typically 2x4 inches (5 by 10 cm) side length, were centrally placed. In some cases, where a silicon platen was used instead of a graphite plate, the changed layer did not behave as well as an application mask as when using the graphite plate. On the basis of this, the hypothesis was made that carbon or hydrocarbon vapor formed on the graphite plate when the hydrogen ion beam strikes can promote the formation of a dielectric layer on the substrate surface. However, it has been found that a modified surface layer 18 produced by this method with acceleration voltages between approximately 1400 and approximately 1700 V and with short exposure times, such as 1 min, is sufficient to subsequently prevent the silicon substrate from being dip-coated between the nickel layers 16 .

Thereafter, the substrate is heated in an inert or nitrogen atmosphere to a temperature and for a time sufficient to sinter the nickel layers and cause the nickel layer 16 on the front of the substrate to react with the adjacent silicon to produce an ohmic form nickel silicide contact. To this end, the substrate is preferably heated to a temperature of about 300 ° C for between about 15 and about 40 minutes. This results in a nickel silicide layer 20 with a depth of approximately 300 angstrom units at the interface between the nickel layer 16 and the substrate 2. The nickel layer 14 on the back forms an alloy with the aluminum layer 10. The temperature of this sintering treatment should not exceed 300 ° C. since higher temperatures lead to an excessive penetration of the nickel layer 16 into the silicon. When this heat treatment is carried out in forming gas (95% nitrogen and 5% hydrogen), it also appears to drive off hydrogen loosely bound to the nickel layer 16, thereby improving the adhesiveness of the subsequent coating.

Thereafter, the nickel of layers 14 and 16 is subjected to hot dilute nitric acid etching, followed by ultrasonic cleaning to remove excess nickel from both sides of the substrate. Nickel etching not only removes excess nickel, but also removes it

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some of the nickel-aluminum alloy formed on the back of the substrate during the sintering step. After the nickel etching step, the layer 14 is characterized by a nickel-aluminum alloy layer covering the aluminum electrode layer 10, while the layer 16 is cleared to such an extent that the nickel-silicide layer 20 corresponding to the previously selected electrode grid pattern is exposed.

Thereafter, the nickel silicide layer 20 and the nickel-aluminum alloy layer 14 are each further metallized with one or more layers 22 and 24 to form suitable contacts. In these metallization steps, the changed surface layer 18 of the substrate 2 acts as an application mask, which prevents metal from adhering to the surface of the substrate between the pattern of the already bound nickel silicide layer 20. This additional metallization preferably, but not necessarily, involves the application of a second nickel layer to layers 14 and 20. The additional nickel layers are dip coated in the manner described above in connection with the formation of nickel layers 14 and 16 because of the dip coating nickel is deposited on the layers 14 and 16, but not on the modified surface layer 18. Immediately afterwards, one or more copper layers (by dip coating and / or glavanization using methods well known to the person skilled in the art) are applied to the exposed nickel on both sides of the substrate, so that they bond with the nickel layers and thereby protect them from oxidation and ensure high conductivity. No masking of the modified layer 18 is required for the copper coating because the copper does not adhere to the modified layer. The device can then be subjected to other treatments for known purposes, e.g. tin and solder layers can be applied in succession to the previously applied metal layers.

Following the metallization, the cell edges (not shown) are trimmed and an antireflective coating 26 is applied to the front surface of the cell. This latter step can be done by any number of known methods, such as chemical vapor deposition or Ti02, for example. Alternatively, an anti-reflective coating 26 can be formed by plasma deposition of silicon nitride.

For example, the preferred method for practicing the present invention involves performing the individual process steps outlined above in the preferred manner described in each step and in the order presented.

It goes without saying that the preferred method according to the invention comprises the implementation of the preferred steps described in detail above, these steps being carried out in the order just specified.

It has been found that solar cells made from EFG-derived strips using the above method show an increase of between 10 and 20% of the average efficiency. In addition, it was found that the hydrogen passivation step also markedly narrows the distribution of the cell efficiencies for this material.

The method described above has a number of other advantages. Firstly, by using the modified surface layer of the substrate generated during the hydrogen passivation as a mask for subsequent application using a dip coating method, e.g. the application of nickel as described above, the passivation of an exposed substrate before such a later metallization. This allows the passivation of a clean substrate (instead of passivation through an application mask layer), avoids «soft» or short-circuited

Cells (as a result of base metal migration during passivation) and makes the steps between passivation and subsequent metallization by dip coating economical, since no additional masking step is necessary. It should be noted that the hydrogen-passivated zone also serves as a mask to prevent copper from being deposited by dip coating or electroplating. In addition, passivation through a thin front electrode material layer can also passivate the substrate underneath the front electrodes, provided that the initial nickel layer is not thicker than about 750 angstrom units. It will also be seen that the method according to the invention inserts the passivation at a stage of cell production in which a subsequent cell treatment does not adversely affect the effects of the passivation.

While in the preferred embodiment the nickel sintering step is carried out after the passivation, it could also be carried out immediately before the passivation. In such a case, it will be appreciated that short ion beam treatments with or without thermal monitoring of the substrate by means of a suitable heat dissipation device may be desirable for cells with a flat junction in order to ensure security against migration of the nickel silicide into the junction. Such monitoring also produces Ni2Si instead of the other silicides (NiSi or NiSi2), which means that less silicon is incorporated per molecule of the silicide and security against complete penetration of the N + zone by the silicide is ensured. It is also understood that if the nickel sintering is carried out before the passivation, a heat treatment step may be required after the passivation in order to drive out loosely bound hydrogen from the nickel before further processing.

It is also apparent that heating the cell during passivation can be used to carry out at least part of the nickel sintering step.

Although the preferred embodiment of the method according to the invention uses the modified layer formed by hydrogen passivation to mask the subsequent nickel dip coating except on nickel that has been applied, the method can also be applied to metals other than nickel. As those skilled in the art will understand, e.g. the initial layer of the front surface electrodes are deposited on a flat junction silicon device by deposition using various methods known to those skilled in the art and using any of a number of materials with low reactivity which (preferably at low temperature) can form an ohmic contact and act as a barrier against the diffusion of copper or any other base metal applied later can serve. Suitable metals for use with copper are palladium, platinum, cobalt and rhodium as well as nickel. Although all of these materials form silicides, a layer of silicide is not necessary. However, it is important that the initial metal layer adheres well, serves as an ohmic contact and acts as a barrier against the migration of any metal subsequently applied and does not migrate significantly into the transition itself.

The method according to the invention is of course not limited to the production of solar cells from EFG substrates. For example, cast polycrystalline substrates, epitaxial silicon on silicon in metallurgical quality, or polysilicon layers of fine quality formed by chemical or physical vapor deposition can be used to form solar cells according to the invention with relatively high efficiency. The method is also applicable to single-crystal silicon. Then the method can also be carried out practically with N- and P-conductive material.

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Claims (11)

669 476 2nd PATENT CLAIMS 1. A method of manufacturing solid-state semiconductor devices, characterized by the series of steps that one (a) forms a silicon substrate with opposing first and second surfaces; (b) exposing selected areas of the first surface to a hydrogen ion beam with an intensity and for a period of time sufficient to form a surface layer on the first surface to which selected metals adhere poorly; and (c) metallizing the first surface with at least one of the selected metals, excluding the selected areas. 2. The method of claim 1, further comprising the step of forming a junction in the substrate adjacent the first surface. 3. The method according to claim 1 for the production of photo elements, characterized in that an anti-reflective coating is applied to the first surface in a further step. 4. The method according to claim 1, characterized in that the metallization is carried out using a metal selected from the group consisting of the metals nickel, palladium, cobalt, platinum and rhodium. 5. The method according to claim 1, characterized by the series of steps that one (a) (a) forming a silicon substrate with opposing first and second surfaces and with a junction adjacent to the first surface, and (ß) forming an application mask leaving a first selected part of the first surface and covering a second selected part of the first surface: (b) applying a nickel coating on the first selected portions of the first surface; (c) the order mask is removed; (d) exposing the second selected portions of the first surface to a hydrogen ion beam with an intensity and for a period of time sufficient to form a surface layer on the first surface to which metals adhere poorly; (e) sintering the nickel coating so that the nickel and silicon on the first selected parts react to form nickel silicide at their interface; and (f) the nickel coating is coated with at least one additional layer of a conductive metal. 6. The method according to claim 5, characterized in that the at least one additional layer of conductive metal is a nickel layer formed by a dip coating process. 7. The method according to claim 6, characterized in that the coating process uses a bath containing a nickel salt and fluoride ions. 8. The method according to claim 1, characterized by the series of steps that one (a) (a) forming a silicon substrate with opposing first and second surfaces and with a junction adjacent to the first surface, and (ß) forming an application mask leaving a first selected part of the first surface and covering a second selected part of the first surface: (b) applying a coating of aluminum to the second surface; (c) heating the silicon substrate to a temperature and for a period of time sufficient to cause the aluminum of the aluminum coating to alloy with the silicon substrate; (d) applying a nickel coating to the first selected portions of the first surface; (e) the order mask is removed; (f) exposing the second selected portions of the first surface to a hydrogen ion beam with an intensity and for a period of time sufficient to form a surface layer on the first surface to which selected conductive metals adhere poorly; (g) sintering the nickel coating so that the nickel and silicon on the first selected parts react to form nickel silicide at their interface; and (h) coating the nickel and aluminum coatings with at least one layer of at least one of the conductive metals. 9. The method according to claim 8, characterized in that the at least one layer is applied by (a) bringing the nickel coating into contact with an etchant to remove unbound nickel and (b) overlaying the nickel coating with copper. 10. The method according to claim 8, characterized in that the first selected parts of the first surface are exposed to the hydrogen ion beam for a time and at an intensity which are additionally sufficient to reduce the minority carrier losses of the substrate. 11. The method according to claim 8, characterized in that the at least one additional conductive metal layer is a copper layer formed by dip coating or electroplating.