CH596879A5 - - Google Patents
Info
- Publication number
- CH596879A5 CH596879A5 CH1062876A CH1062876A CH596879A5 CH 596879 A5 CH596879 A5 CH 596879A5 CH 1062876 A CH1062876 A CH 1062876A CH 1062876 A CH1062876 A CH 1062876A CH 596879 A5 CH596879 A5 CH 596879A5
- Authority
- CH
- Switzerland
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/061—Gettering-armorphous layers
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19752537464 DE2537464A1 (de) | 1975-08-22 | 1975-08-22 | Verfahren zur entfernung spezifischer kristallbaufehler aus halbleiterscheiben |
Publications (1)
Publication Number | Publication Date |
---|---|
CH596879A5 true CH596879A5 (US20090163788A1-20090625-C00002.png) | 1978-03-31 |
Family
ID=5954629
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH1062876A CH596879A5 (US20090163788A1-20090625-C00002.png) | 1975-08-22 | 1976-08-20 |
Country Status (9)
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4144099A (en) * | 1977-10-31 | 1979-03-13 | International Business Machines Corporation | High performance silicon wafer and fabrication process |
JPS54110783A (en) * | 1978-02-20 | 1979-08-30 | Hitachi Ltd | Semiconductor substrate and its manufacture |
US4177084A (en) * | 1978-06-09 | 1979-12-04 | Hewlett-Packard Company | Method for producing a low defect layer of silicon-on-sapphire wafer |
US4231809A (en) * | 1979-05-25 | 1980-11-04 | Bell Telephone Laboratories, Incorporated | Method of removing impurity metals from semiconductor devices |
DE2927220A1 (de) * | 1979-07-05 | 1981-01-15 | Wacker Chemitronic | Verfahren zur stapelfehlerinduzierenden oberflaechenzerstoerung von halbleiterscheiben |
US4257827A (en) * | 1979-11-13 | 1981-03-24 | International Business Machines Corporation | High efficiency gettering in silicon through localized superheated melt formation |
JPS5680139A (en) * | 1979-12-05 | 1981-07-01 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor device |
JPS57104228A (en) * | 1980-12-22 | 1982-06-29 | Nec Corp | Manufacture of semiconductor device |
US4665695A (en) | 1981-03-13 | 1987-05-19 | Trw Inc. | Hydrostatic load sense steering system |
DE3148957C2 (de) * | 1981-12-10 | 1987-01-02 | Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH, 8263 Burghausen | Verfahren zum Herstellen rückseitig oberflächengestörter Halbleiterscheiben |
JPS61159371A (ja) * | 1984-12-28 | 1986-07-19 | Fuji Seiki Seizosho:Kk | Icの基板用シリコンウェーハのブラスト装置 |
US4659400A (en) * | 1985-06-27 | 1987-04-21 | General Instrument Corp. | Method for forming high yield epitaxial wafers |
DE3737815A1 (de) * | 1987-11-06 | 1989-05-18 | Wacker Chemitronic | Siliciumscheiben zur erzeugung von oxidschichten hoher durchschlagsfestigkeit und verfahren zur ihrer herstellung |
DE3934140A1 (de) * | 1989-10-12 | 1991-04-18 | Wacker Chemitronic | Verfahren zur die ausbildung von getterfaehigen zentren induzierenden oberflaechenbehandlung von halbleiterscheiben und dadurch erhaeltliche beidseitig polierte scheiben |
KR100231607B1 (ko) * | 1996-12-31 | 1999-11-15 | 김영환 | 반도체 소자의 초저접합 형성방법 |
JP2000294549A (ja) * | 1999-02-02 | 2000-10-20 | Nec Corp | 半導体装置及びその製造方法 |
TW462085B (en) * | 2000-10-26 | 2001-11-01 | United Microelectronics Corp | Planarization of organic silicon low dielectric constant material by chemical mechanical polishing |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3701696A (en) * | 1969-08-20 | 1972-10-31 | Gen Electric | Process for simultaneously gettering,passivating and locating a junction within a silicon crystal |
GB1334520A (en) * | 1970-06-12 | 1973-10-17 | Atomic Energy Authority Uk | Formation of electrically insulating layers in semiconducting materials |
FR2191272A1 (US20090163788A1-20090625-C00002.png) * | 1972-06-27 | 1974-02-01 | Ibm France | |
JPS5037348A (US20090163788A1-20090625-C00002.png) * | 1973-08-06 | 1975-04-08 | ||
JPS5051665A (US20090163788A1-20090625-C00002.png) * | 1973-09-07 | 1975-05-08 | ||
US3929529A (en) * | 1974-12-09 | 1975-12-30 | Ibm | Method for gettering contaminants in monocrystalline silicon |
US3933530A (en) * | 1975-01-28 | 1976-01-20 | Rca Corporation | Method of radiation hardening and gettering semiconductor devices |
US3997368A (en) * | 1975-06-24 | 1976-12-14 | Bell Telephone Laboratories, Incorporated | Elimination of stacking faults in silicon devices: a gettering process |
-
1975
- 1975-08-22 DE DE19752537464 patent/DE2537464A1/de active Pending
-
1976
- 1976-07-23 US US05/708,235 patent/US4042419A/en not_active Expired - Lifetime
- 1976-07-27 NL NL7608324A patent/NL7608324A/xx unknown
- 1976-08-16 FR FR7624886A patent/FR2321325A1/fr active Granted
- 1976-08-18 DK DK373076A patent/DK373076A/da unknown
- 1976-08-20 CH CH1062876A patent/CH596879A5/xx not_active IP Right Cessation
- 1976-08-20 BE BE169962A patent/BE845381A/xx unknown
- 1976-08-20 IT IT50964/76A patent/IT1076467B/it active
- 1976-08-23 JP JP51100473A patent/JPS5226160A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
FR2321325A1 (fr) | 1977-03-18 |
IT1076467B (it) | 1985-04-27 |
DE2537464A1 (de) | 1977-03-03 |
US4042419A (en) | 1977-08-16 |
DK373076A (da) | 1977-02-23 |
JPS5226160A (en) | 1977-02-26 |
FR2321325B1 (US20090163788A1-20090625-C00002.png) | 1978-11-03 |
BE845381A (fr) | 1977-02-21 |
NL7608324A (nl) | 1977-02-24 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |