CH553481A - Ensemble pour polariser le substrat d'un circuit integre. - Google Patents

Ensemble pour polariser le substrat d'un circuit integre.

Info

Publication number
CH553481A
CH553481A CH964472A CH964472A CH553481A CH 553481 A CH553481 A CH 553481A CH 964472 A CH964472 A CH 964472A CH 964472 A CH964472 A CH 964472A CH 553481 A CH553481 A CH 553481A
Authority
CH
Switzerland
Prior art keywords
polarize
substrate
integrated circuit
integrated
circuit
Prior art date
Application number
CH964472A
Other languages
English (en)
Original Assignee
Battelle Memorial Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Battelle Memorial Institute filed Critical Battelle Memorial Institute
Priority to CH964472A priority Critical patent/CH553481A/fr
Priority to GB3016773A priority patent/GB1372679A/en
Priority to US00373872A priority patent/US3845331A/en
Priority to FR7323386A priority patent/FR2191276B1/fr
Priority to DE2333777A priority patent/DE2333777C2/de
Priority to IT68912/73A priority patent/IT986599B/it
Priority to JP7184073A priority patent/JPS5724661B2/ja
Publication of CH553481A publication Critical patent/CH553481A/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0222—Charge pumping, substrate bias generation structures
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/1057—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components comprising charge coupled devices [CCD] or charge injection devices [CID]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Solid State Image Pick-Up Elements (AREA)
CH964472A 1972-06-27 1972-06-27 Ensemble pour polariser le substrat d'un circuit integre. CH553481A (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
CH964472A CH553481A (fr) 1972-06-27 1972-06-27 Ensemble pour polariser le substrat d'un circuit integre.
GB3016773A GB1372679A (en) 1972-06-27 1973-06-25 Arrangements for biasing the substrates of integrated circuits
US00373872A US3845331A (en) 1972-06-27 1973-06-26 Arrangements for biasing the substrate of an integrated circuit
FR7323386A FR2191276B1 (fr) 1972-06-27 1973-06-26
DE2333777A DE2333777C2 (de) 1972-06-27 1973-06-27 Anordnung zum Erzeugen einer Vorspannung für das Substrat eines integrierten Schaltkreises
IT68912/73A IT986599B (it) 1972-06-27 1973-06-27 Complesso per polarizzare il substrato di un circuito inte grato
JP7184073A JPS5724661B2 (fr) 1972-06-27 1973-06-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH964472A CH553481A (fr) 1972-06-27 1972-06-27 Ensemble pour polariser le substrat d'un circuit integre.

Publications (1)

Publication Number Publication Date
CH553481A true CH553481A (fr) 1974-08-30

Family

ID=4354136

Family Applications (1)

Application Number Title Priority Date Filing Date
CH964472A CH553481A (fr) 1972-06-27 1972-06-27 Ensemble pour polariser le substrat d'un circuit integre.

Country Status (7)

Country Link
US (1) US3845331A (fr)
JP (1) JPS5724661B2 (fr)
CH (1) CH553481A (fr)
DE (1) DE2333777C2 (fr)
FR (1) FR2191276B1 (fr)
GB (1) GB1372679A (fr)
IT (1) IT986599B (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3922571A (en) * 1974-06-12 1975-11-25 Bell Telephone Labor Inc Semiconductor voltage transformer
US4090095A (en) * 1976-02-17 1978-05-16 Rca Corporation Charge coupled device with diode reset for floating gate output
CH614837B (fr) * 1977-07-08 Ebauches Sa Dispositif pour regler, a une valeur determinee, la tension de seuil de transistors igfet d'un circuit integre par polarisation du substrat d'integration.
JPS5593252A (en) * 1979-01-05 1980-07-15 Mitsubishi Electric Corp Substrate potential generating apparatus
JPS56500108A (fr) * 1979-03-13 1981-02-05
JPS55162257A (en) * 1979-06-05 1980-12-17 Fujitsu Ltd Semiconductor element having substrate bias generator circuit
US4326134A (en) * 1979-08-31 1982-04-20 Xicor, Inc. Integrated rise-time regulated voltage generator systems
US4539490A (en) * 1979-12-08 1985-09-03 Tokyo Shibaura Denki Kabushiki Kaisha Charge pump substrate bias with antiparasitic guard ring
US4468686A (en) * 1981-11-13 1984-08-28 Intersil, Inc. Field terminating structure
DE3681540D1 (de) * 1985-08-26 1991-10-24 Siemens Ag Integrierte schaltung in komplementaerer schaltungstechnik mit einem substratvorspannungs-generator.
US5006974A (en) * 1987-12-24 1991-04-09 Waferscale Integration Inc. On-chip high voltage generator and regulator in an integrated circuit
US11929674B2 (en) 2021-05-12 2024-03-12 Stmicroelectronics S.R.L. Voltage multiplier circuit

Also Published As

Publication number Publication date
GB1372679A (en) 1974-11-06
DE2333777A1 (de) 1974-01-10
FR2191276A1 (fr) 1974-02-01
FR2191276B1 (fr) 1977-09-16
JPS5724661B2 (fr) 1982-05-25
JPS4952986A (fr) 1974-05-23
US3845331A (en) 1974-10-29
DE2333777C2 (de) 1983-08-25
IT986599B (it) 1975-01-30

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Legal Events

Date Code Title Description
PUE Assignment

Owner name: ETA S.A. FABRIQUES D EBAUCHES

PL Patent ceased