CH526179A - Montage comprenant un premier et un second bloc de circuits dont l'un au moins est un circuit intégré - Google Patents

Montage comprenant un premier et un second bloc de circuits dont l'un au moins est un circuit intégré

Info

Publication number
CH526179A
CH526179A CH1368170A CH1368170A CH526179A CH 526179 A CH526179 A CH 526179A CH 1368170 A CH1368170 A CH 1368170A CH 1368170 A CH1368170 A CH 1368170A CH 526179 A CH526179 A CH 526179A
Authority
CH
Switzerland
Prior art keywords
circuits
assembly
block
integrated circuit
integrated
Prior art date
Application number
CH1368170A
Other languages
English (en)
French (fr)
Inventor
Yoshida Yukihiro
Hanahara Hitoshi
Original Assignee
Sharp Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kk filed Critical Sharp Kk
Publication of CH526179A publication Critical patent/CH526179A/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/22—Means for limiting or controlling the pin/gate ratio
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
  • Shift Register Type Memory (AREA)
CH1368170A 1969-09-16 1970-09-15 Montage comprenant un premier et un second bloc de circuits dont l'un au moins est un circuit intégré CH526179A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7343469 1969-09-16

Publications (1)

Publication Number Publication Date
CH526179A true CH526179A (fr) 1972-07-31

Family

ID=13518118

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1368170A CH526179A (fr) 1969-09-16 1970-09-15 Montage comprenant un premier et un second bloc de circuits dont l'un au moins est un circuit intégré

Country Status (8)

Country Link
BE (1) BE756121A (xx)
CA (1) CA946077A (xx)
CH (1) CH526179A (xx)
DE (2) DE2045833C3 (xx)
FR (1) FR2065694B1 (xx)
GB (1) GB1330515A (xx)
NL (1) NL175114C (xx)
SE (1) SE360529B (xx)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4196358A (en) * 1977-08-16 1980-04-01 Fairchild Camera & Instrument Corporation Analog multiplexer
EP0172493B1 (en) * 1980-03-19 1990-11-14 Kabushiki Kaisha Toshiba Information processing system
EP0062431B1 (en) * 1981-03-20 1986-10-01 Fujitsu Limited A one chip microcomputer

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3461312A (en) * 1964-10-13 1969-08-12 Ibm Signal storage circuit utilizing charge storage characteristics of field-effect transistor
FR1476959A (fr) * 1966-01-28 1967-04-14 North American Aviation Inc Système de conditionnement à phases multiples
CH502645A (de) * 1968-02-01 1971-01-31 Telephone Mfg Co Ltd Elektronische Datenverarbeitungseinrichtung, insbesondere solche, deren Arbeitsgeschwindigkeit grösser ist als die ihrer Teile

Also Published As

Publication number Publication date
DE2045833B2 (de) 1975-11-06
SE360529B (xx) 1973-09-24
BE756121A (fr) 1971-02-15
DE2045833A1 (de) 1971-04-22
DE2066205C3 (de) 1985-03-21
GB1330515A (en) 1973-09-19
NL175114B (nl) 1984-04-16
CA946077A (en) 1974-04-23
NL175114C (nl) 1984-09-17
NL7013649A (xx) 1971-03-18
DE2045833C3 (de) 1982-09-23
FR2065694A1 (xx) 1971-08-06
FR2065694B1 (xx) 1973-12-21

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Legal Events

Date Code Title Description
PL Patent ceased