CA2367324A1 - Re-order buffer managing method and processor - Google Patents

Re-order buffer managing method and processor Download PDF

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Publication number
CA2367324A1
CA2367324A1 CA 2367324 CA2367324A CA2367324A1 CA 2367324 A1 CA2367324 A1 CA 2367324A1 CA 2367324 CA2367324 CA 2367324 CA 2367324 A CA2367324 A CA 2367324A CA 2367324 A1 CA2367324 A1 CA 2367324A1
Authority
CA
Canada
Prior art keywords
instruction
re
order
order buffer
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA 2367324
Other languages
French (fr)
Other versions
CA2367324C (en
Inventor
Masao Fukagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2001002141A priority Critical patent/JP3518510B2/en
Priority to JP2001-002141 priority
Application filed by NEC Corp filed Critical NEC Corp
Publication of CA2367324A1 publication Critical patent/CA2367324A1/en
Application granted granted Critical
Publication of CA2367324C publication Critical patent/CA2367324C/en
Application status is Expired - Fee Related legal-status Critical
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
    • G06F9/3838Dependency mechanisms, e.g. register scoreboarding
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
    • G06F9/3838Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384Register renaming
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
    • G06F9/3855Reordering, e.g. using a queue, age tags
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling

Abstract

A managing method for a re-order buffer in an out-of-order execution processor for predicting the flow of a program by branch prediction comprises determining a next executable instruction from an instruction string in the program and speculatively executing the instruction on the basis of a dependence relationship between the prediction and the instruction. The re-order buffer re-writes an execution result according to a program order, and the end of the instruction is notified from function units containing a branch unit and a load unit to the re-order buffer by using an entry number buffer. The load unit manages the latest speculation state of a load instruction based on a branch prediction success/failure signal from the branch unit but does not provide notification to the re-order buffer based on the entry number for subsequent load instructions which the branching prediction has failed, even if processing of the instruction has finished.
CA 2367324 2001-01-10 2002-01-08 Re-order buffer managing method and processor Expired - Fee Related CA2367324C (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2001002141A JP3518510B2 (en) 2001-01-10 2001-01-10 Management method and processor reorder buffer
JP2001-002141 2001-01-10

Publications (2)

Publication Number Publication Date
CA2367324A1 true CA2367324A1 (en) 2002-07-10
CA2367324C CA2367324C (en) 2006-08-08

Family

ID=18870690

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2367324 Expired - Fee Related CA2367324C (en) 2001-01-10 2002-01-08 Re-order buffer managing method and processor

Country Status (4)

Country Link
US (1) US6938150B2 (en)
EP (1) EP1223507A1 (en)
JP (1) JP3518510B2 (en)
CA (1) CA2367324C (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7633861B2 (en) * 2003-04-25 2009-12-15 Alcatel-Lucent Usa Inc. Fabric access integrated circuit configured to bound cell reorder depth
WO2006114874A1 (en) 2005-04-21 2006-11-02 Fujitsu Limited Processor device
JP4814653B2 (en) 2006-02-27 2011-11-16 富士通株式会社 Reordering apparatus
US9026769B1 (en) * 2011-01-31 2015-05-05 Marvell International Ltd. Detecting and reissuing of loop instructions in reorder structure
JP5949327B2 (en) * 2012-08-24 2016-07-06 富士通株式会社 Control method for an arithmetic processing device and a processing unit
JP2015118638A (en) * 2013-12-19 2015-06-25 キヤノン株式会社 Information processing device and control method thereof, and program
US10241789B2 (en) * 2016-12-27 2019-03-26 Intel Corporation Method to do control speculation on loads in a high performance strand-based loop accelerator

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04242431A (en) 1991-01-16 1992-08-31 Koufu Nippon Denki Kk Information processor
JPH05173785A (en) 1991-12-25 1993-07-13 Koufu Nippon Denki Kk Instruction prefetching device
JPH07306785A (en) 1994-05-11 1995-11-21 Toshiba Corp Processor with branch instruction executing function and branch instruction control method
US5933618A (en) * 1995-10-30 1999-08-03 Advanced Micro Devices, Inc. Speculative register storage for storing speculative results corresponding to register updated by a plurality of concurrently recorded instruction
US5611063A (en) * 1996-02-06 1997-03-11 International Business Machines Corporation Method for executing speculative load instructions in high-performance processors
JP3473249B2 (en) 1996-03-08 2003-12-02 株式会社日立製作所 Central processing unit
US5983342A (en) * 1996-09-12 1999-11-09 Advanced Micro Devices, Inc. Superscalar microprocessor employing a future file for storing results into multiportion registers
US5870579A (en) * 1996-11-18 1999-02-09 Advanced Micro Devices, Inc. Reorder buffer including a circuit for selecting a designated mask corresponding to an instruction that results in an exception
JP2933560B2 (en) 1997-03-24 1999-08-16 甲府日本電気株式会社 The information processing apparatus having multiple pipeline
JP2910848B1 (en) 1997-12-29 1999-06-23 日本電気株式会社 Speculative execution instruction count device
US6289442B1 (en) * 1998-10-05 2001-09-11 Advanced Micro Devices, Inc. Circuit and method for tagging and invalidating speculatively executed instructions
SE513431C2 (en) * 1999-01-11 2000-09-11 Ericsson Telefon Ab L M Buffer not reported jump

Also Published As

Publication number Publication date
US6938150B2 (en) 2005-08-30
CA2367324C (en) 2006-08-08
JP2002207595A (en) 2002-07-26
JP3518510B2 (en) 2004-04-12
EP1223507A1 (en) 2002-07-17
US20020091913A1 (en) 2002-07-11

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