CA2329542C - System and method for scheduling message transmission and processing in a digital data network - Google Patents

System and method for scheduling message transmission and processing in a digital data network Download PDF

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Publication number
CA2329542C
CA2329542C CA002329542A CA2329542A CA2329542C CA 2329542 C CA2329542 C CA 2329542C CA 002329542 A CA002329542 A CA 002329542A CA 2329542 A CA2329542 A CA 2329542A CA 2329542 C CA2329542 C CA 2329542C
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CA
Canada
Prior art keywords
virtual circuit
virtual
transmit
receive
message packets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA002329542A
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English (en)
French (fr)
Other versions
CA2329542A1 (en
Inventor
Shawn A. Clayton
David R. Follett
Nitin D. Godiwala
Maria C. Gutierrez
David S. Wells
James B. Williams
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Emulex Corp
Original Assignee
Emulex Design and Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Emulex Design and Manufacturing Corp filed Critical Emulex Design and Manufacturing Corp
Publication of CA2329542A1 publication Critical patent/CA2329542A1/en
Application granted granted Critical
Publication of CA2329542C publication Critical patent/CA2329542C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/6215—Individual queue per QOS, rate or priority
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/622—Queue service order
    • H04L47/6225—Fixed service order, e.g. Round Robin
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9063—Intermediate storage in different physical parts of a node or terminal
    • H04L49/9078—Intermediate storage in different physical parts of a node or terminal using an external memory or storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
CA002329542A 1998-04-23 1999-04-23 System and method for scheduling message transmission and processing in a digital data network Expired - Lifetime CA2329542C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/065,115 1998-04-23
US09/065,115 US6795442B1 (en) 1998-04-23 1998-04-23 System and method for scheduling message transmission and processing in a digital data network
PCT/US1999/009021 WO1999054829A1 (en) 1998-04-23 1999-04-23 System and method for scheduling message transmission and processing in a digital data network

Publications (2)

Publication Number Publication Date
CA2329542A1 CA2329542A1 (en) 1999-10-28
CA2329542C true CA2329542C (en) 2008-11-18

Family

ID=22060429

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002329542A Expired - Lifetime CA2329542C (en) 1998-04-23 1999-04-23 System and method for scheduling message transmission and processing in a digital data network

Country Status (6)

Country Link
US (2) US6795442B1 (US07585860-20090908-C00162.png)
EP (1) EP1080416A4 (US07585860-20090908-C00162.png)
JP (1) JP4358437B2 (US07585860-20090908-C00162.png)
AU (1) AU752188B2 (US07585860-20090908-C00162.png)
CA (1) CA2329542C (US07585860-20090908-C00162.png)
WO (1) WO1999054829A1 (US07585860-20090908-C00162.png)

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US7305493B2 (en) * 2002-11-27 2007-12-04 Intel Corporation Embedded transport acceleration architecture
US6901072B1 (en) 2003-05-15 2005-05-31 Foundry Networks, Inc. System and method for high speed packet transmission implementing dual transmit and receive pipelines
US7817659B2 (en) 2004-03-26 2010-10-19 Foundry Networks, Llc Method and apparatus for aggregating input data streams
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US9699102B2 (en) * 2004-08-09 2017-07-04 Arris Enterprises Llc Very high speed cable modem for increasing bandwidth
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US7724733B2 (en) * 2005-03-31 2010-05-25 International Business Machines Corporation Interconnecting network for switching data packets and method for switching data packets
US7853957B2 (en) * 2005-04-15 2010-12-14 Intel Corporation Doorbell mechanism using protection domains
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US8448162B2 (en) 2005-12-28 2013-05-21 Foundry Networks, Llc Hitless software upgrades
US7853281B2 (en) * 2006-04-14 2010-12-14 Qualcomm Incorporated Methods and apparatus for tracking wireless terminal power information
US7948922B2 (en) * 2006-04-18 2011-05-24 Cisco Technology, Inc. Blocked redundant link-aware spanning tree protocol enhancement
US7821986B2 (en) * 2006-05-31 2010-10-26 Cisco Technology, Inc. WLAN infrastructure provided directions and roaming
EP2036262A1 (en) * 2006-06-20 2009-03-18 Freescale Semiconductor, Inc. Method for transmitting a datum from a time-dependent data storage means
US8001309B2 (en) 2006-06-22 2011-08-16 Freescale Semiconductor, Inc. Method and system for grouping interrupts from a time-dependent data storage system
US20080056125A1 (en) * 2006-09-06 2008-03-06 Nokia Corporation Congestion control in a wireless network
US8238255B2 (en) 2006-11-22 2012-08-07 Foundry Networks, Llc Recovering from failures without impact on data traffic in a shared bus architecture
US7978614B2 (en) 2007-01-11 2011-07-12 Foundry Network, LLC Techniques for detecting non-receipt of fault detection protocol packets
US8271859B2 (en) 2007-07-18 2012-09-18 Foundry Networks Llc Segmented CRC design in high speed networks
US8037399B2 (en) 2007-07-18 2011-10-11 Foundry Networks, Llc Techniques for segmented CRC design in high speed networks
US8149839B1 (en) 2007-09-26 2012-04-03 Foundry Networks, Llc Selection of trunk ports and paths using rotation
US7836198B2 (en) * 2008-03-20 2010-11-16 International Business Machines Corporation Ethernet virtualization using hardware control flow override
US8458380B2 (en) * 2008-03-26 2013-06-04 Qualcomm Incorporated Off-line task list architecture utilizing tightly coupled memory system
US8520571B2 (en) 2008-03-26 2013-08-27 Qualcomm Incorporated Reconfigurable wireless modem sub-circuits to implement multiple air interface standards
US8787433B2 (en) * 2008-03-28 2014-07-22 Qualcomm Incorporated Wall clock timer and system for generic modem
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US9065773B2 (en) * 2010-06-22 2015-06-23 Juniper Networks, Inc. Methods and apparatus for virtual channel flow control associated with a switch fabric
CN105812365B (zh) * 2016-03-12 2018-09-28 武汉芯泰科技有限公司 一种可编程可重构的帧处理器
FR3140501A1 (fr) * 2022-09-30 2024-04-05 Orange Procédé de gestion du trafic de données entre une entité source et une entité destinataire, entité et programme d’ordinateur correspondants.
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Also Published As

Publication number Publication date
US7295557B2 (en) 2007-11-13
AU3762199A (en) 1999-11-08
EP1080416A1 (en) 2001-03-07
US20040208181A1 (en) 2004-10-21
CA2329542A1 (en) 1999-10-28
EP1080416A4 (en) 2005-01-19
JP4358437B2 (ja) 2009-11-04
AU752188B2 (en) 2002-09-12
US6795442B1 (en) 2004-09-21
JP2002512459A (ja) 2002-04-23
WO1999054829A1 (en) 1999-10-28

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