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CA2159763C - Programmable jump window for sonet compliant bit error monitoring - Google Patents

Programmable jump window for sonet compliant bit error monitoring

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Publication number
CA2159763C
CA2159763C CA 2159763 CA2159763A CA2159763C CA 2159763 C CA2159763 C CA 2159763C CA 2159763 CA2159763 CA 2159763 CA 2159763 A CA2159763 A CA 2159763A CA 2159763 C CA2159763 C CA 2159763C
Authority
CA
Grant status
Grant
Patent type
Prior art keywords
channel
data
threshold
error
ber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA 2159763
Other languages
French (fr)
Other versions
CA2159763A1 (en )
Inventor
Rick G. Dorbolo
David Wong
Chris Edward Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi Storage Solutions Ltd
Original Assignee
Microsemi Storage Solutions Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Grant date

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/20Arrangements for detecting or preventing errors in the information received using signal quality detector
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/14Monitoring arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J2203/00Aspects of optical multiplex systems other than those covered by H04J14/00
    • H04J2203/0001Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0057Operations, administration and maintenance [OAM]
    • H04J2203/006Fault tolerance and recovery

Abstract

A method of determining an error level of a data channel comprised of (a) receiving channel parity error data indicating when bit errors occur within a set of data carried on the channel (channel error events), successively integrating the channel error events data over successive accumulation periods, comparing the integrated channel error events data with a threshold, and indicating an alarm in the event the integrated channel error events data exceeds the threshold.

Description

FIELD OF THE INVENTION
This invention relates to the field of data transmission, and in particular to a method of detecting an error level of data carried by a data channel.
BACKGROUND TO THE lNv~NllON
In many communication systems, a channel bit error rate (BER) is used as a figure of merit. One type of communication system standard is Synchronous Optical Network (SONET), wherein a receiver, i.e. a line terminating device, must determine the channel BER
quickly, and must react in the event the BER increases above defined error thresholds. Each receiver must thus be able to measure the channel BER, and indicate when the channel BER has exceeded a predetermined threshold.
In SONET systems, a sliding window is used, wherein the number of error bits received during the last N received bits is calculated, N being the window size. The number of bit errors during the window can be used to statistically estimate the channel BER.
Alternatively, the number of bit errors during the window can be compared to a threshold value. If the threshold is exceeded, a BER monitoring circuit indicates that the channel BER has exceeded the threshold. This calculation is repeated for each bit received.
A significant problem exists in utilizing a sliding window. Error statistics of each bit in the window must be stored. Since the window size can get very large, it has been found to be cumbersome to implement the above in hardware.
SUMMARY OF THE INVENTION
In accordance with an embodiment of the present invention, instead of using a sliding window and directly counting the BER, the BER is monitored by integrating (accumulating) line bit-interleaved-parity 2l59763 (line BIP) indications over a programmable length of time. If during the integration interval the accumulated count exceeds a programmable threshold, the an alarm is raised.
In accordance with a preferred embodiment of the invention, a method of determining an error level of a data channel is comprised of receiving channel parity error data indicating when bit errors occur within a set of data carried on the channel (channel error events), successively integrating the channel error events data over successive accumulation periods, comparing the integrated channel error events data with a threshold, and indicating an alarm in the event the integrated channel error events data exceeds the threshold.
BRIEF INTRODUCTION TO THE DRAWINGS
A better understanding of the invention will be obtained by reading the description of the invention below, with reference to the following drawings, in which:
Figure 1 is a block diagram illustrating a structure on which the present invention can be implemented, and Figure 2 is an illustration of error vs. time, with integration intervals.
DETAILED DESCRIPTION OF THE INVENTION
In Figure 1, data carried by a channel 1 is applied to a BIP event generator 3. The output of generator 3 is data describing line BIP events, which is applied to an input of a line BIP event counter 5, i.e.
an integrator or accumulator.
A programmable timer 7, having a time base derived from the frames carried by the data channel outputs a reset signal to the counter 5.

The output of counter 5 is applied to a comparator 9, which has another input connected to the output of a programmable threshold generator.
The BIP event generator monitors the data channel, and provides an output data signal which indicates line bit-interleaved-parity (line BIP) errors.
The counter 5 counts that data, i.e. the line BIP errors over an interval timed by the programmable timer 7. The integrated output of counter 5 is applied to the comparator 9, which compares the line BIP errors with a threshold determined by threshold generator 11, and generates an alarm at its SD output line when that threshold is exceeded.
The line BIP data is determined in generator 3 from the channel data bit errors as follows. A line BIP
event is generated in event generator 3 when an odd number of bit errors occur within a set of data which is protected. In for example a SONET signal, there are 8 *
N line BIP parity bits per frame, where N is the hierarchy level of the SONET signal, and there are 8000 frames per second.
Each BIP parity bit is calculated over 801 bits, in a SONET signal. To determine the probability of a line BIP (PgIp), the channel BER probability (Pe) is determined. PpIg is equal to the probability of an odd number of errors, wherein PB1P PI_~rrOr + P3 errors + P5_~rrors+
PBIP = ( )Pe (1 _ P, ) + ( )Pe (1--P6 ) + ( 5 )Pe (1--Pe )+

_ 4 -where (K)' is the combination of n things k at a time. The calculated PgIp as a function of Pe is given in Table 1 below:

¦BER PBIP
10-4 0.07402014 5 x 10-5 0.03848983 10-5 0.00794626 5 x 10-6 0.00398902 10-6 0.00080036 5 x 10-7 0.00040034 10-7 8.0094 x 10-5 5 x 10-8 4.0048 x 10-5 1o~8 8.0099 x 10-6 5 x 10-9 4.005 x 10-6 10-9 8.01 x 10-7 5 x 10-1 4.005 x 10-7 The BIP error rate is thus generated, as a function of Pe-The integration period is set by theprogrammable timer 7, which resets the integrating counter 5. The integration period is the period between resets. This integrating period is one half of the required detection time, in order to ensure to a high probability that the alarm will be raised within the required detection time.
For a SONET signal, the timer 7 receives an 8 KHz time base, which is derived from the SONET data frames (recalling that the SONET signal has 8000 frames per second). The timer establishes reset signals by dividing down the 8 KHz framing signal that is input to it.

- s - 21 ~9 763 Figure 2 illustrates integration periods 15.
The integration period is chosen to be one half the detection time, because the error condition may begin at any time during the first integration period. Data carrying errors is illustrated as the shaded portions 17.
As may be seen, since the first integration period containing erroneous data (the second period 15 from the left) does not completely contain the error condition, it will not likely accumulate enough errors to indicate an alarm condition. By choosing half the period as the integration time, it is guaranteed that within the required detect time, the next following integration period will contain an entire degraded signal. Enough errors would thus be accumulated to indicate the alarm condition.
The threshold signal to be output from threshold generator is preferred to be between two values TMAX and TMIN, as follows:
TMAX=(64OOOTaNO)PB~P--2 3~(64OOOTaNO)(PBIP)(1--PBIP) TM~N = (64OOOTaNo)pg,p,2 +5.6~(640ooTaNo)(pplpl2)(l--PBIPI2) It has been determined that if the threshold is set to a value greater than TMAX~ less than 99% of all alarm conditions will be detected. If the threshold is set to a value lower than TMAX~ then a greater percentage of alarm conditions will be detected, but also there will be a greater number of false alarms from channels with BERs less than the threshold. The first partly degraded integration period can be ignored, in order to have more conservative threshold values, and _ 6 -the average detection time will be lower than otherwise expected.
At times when the channel BER is less than the threshold BER, the number of threshold crossings should be very small. That is, the number of false signal degrade (SD) alarms should be very small. Specifically, 99% of the time, a threshold crossing should not be detected/declared within 10,000 seconds when the line error rate (BER) equals one-half the threshold error rate.
As an example, consider a threshold crossing at a BER of 10-4 with a 50 ms. integration period. In 104 seconds, there will be 104s./50 ms. = 200,000 integration periods. It is required that during 200,000 integration periods, the probability of one more integration period not exceeding the low threshold is at most 1%. This probability PLow is given by 0.99 = (1 - PLow)2XK)00 - 1 - (200000)PLOW
Solving for PLow=5o x 10-9 Similarly, for the case of a BER threshold of 10-6, PLow would be approximately 50 x 10-8- To further simplify, PLow could be set to a further small value, 10-8, which is smaller than all of the other PLow.
In order to meet a PLow Of 10-8, the threshold must be set to 5.6~ greater than the mean number of errors occurring at half the BER of the threshold, which is the equation indicated as TMIN noted above.
Threshold values and integration periods which are preferred to be used to meet SONET standards is shown in the tables below. If BERM accumulation registers are restricted to 16 bits, the BERs are restricted to the range of 10-4 to 10-7- If a larger 2l s9 763 -accumulation inteveral register is used, BERs down to 10-9 can be used.

TABLE 2: SONET STANDARD STS-1 BER Accumulation T i Tmax (seconds) 1.0-4 5.oo-2 184 203 1.0-5 5.oo~l 190 218 l.o-06 5.00+ 191 220 TABLE 3: RECOMMENDED PROGRAMMING OF BERM REGISTERS FOR

Accumulation T
BER interval Tmin max (seconds) 1.0-4 1.67-2 184 203 1.0-5 1.67-1 190 218 l.o-06 1.67+ 191 220 TABLE 4: RECOMMENDED PROGRAMMING OF BERM REGISTERS FOR

BER Accumulation Tmin Tmax Interval Seconds 1.0-4 4.17-3 184 203 1.0-5 4.17-2 190 218 1 o~06 4.17-l 191 220 1.0-7 4.17+ 191 220 - 8 - 21 $9 76~

A person understanding this invention may now conceive of alternative structures and embodiments or variations of the above. All of those which fall within the scope of the claims appended hereto are considered to be part of the present invention.

Claims (5)

1. A method of determining an error level of a data channel comprising:
(a) receiving channel parity error data indicating when bit errors occur within a set of data carried on the channel (channel error events), (b) successively integrating the channel error events data over successive accumulation periods, (c) comparing the integrated channel error events data with a threshold, (d) indicating an alarm in the event the integrated channel error events data exceeds the threshold, and (e) said integrating step comprising integrating the detected channel error events data over accumulation periods each of which is one-half of a predetermined detection interval.
2. A method as defined in claim 1 in which each of the accumulation periods and the threshold are programmable.
3. A method as defined in claim 1 in which at least one of the accumulation periods and the threshold is fixed.
4. A method as defined in claim 2, in which the threshold is between the values TAX and TMIN, where P BIP is the probability of an odd number of errors occurring, as detected using line bit interleaved parity, T a is the accumulation interval in seconds, and N o is the hierarchy level of the signal.
5. A method as defined in claim 1 including recovering line or framing pulses from the data channel and deriving a clock time base therefrom for the integration step.
CA 2159763 1995-05-18 1995-10-03 Programmable jump window for sonet compliant bit error monitoring Expired - Fee Related CA2159763C (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US08444307 US5606563A (en) 1995-05-18 1995-05-18 Programmable jump window for sonet compliant bit error monitoring
US08/444,307 1995-05-18

Publications (2)

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CA2159763A1 true CA2159763A1 (en) 1996-11-19
CA2159763C true CA2159763C (en) 2000-01-04

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Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2197263A1 (en) * 1997-02-11 1998-08-11 Dan Burke Method of detecting signal degradation fault conditions within sonet and sdh signals
EP1253737A1 (en) * 2001-04-26 2002-10-30 Rohde & Schwarz GmbH & Co. KG Method for testing the bit error ratio of a device
EP1382151B1 (en) * 2001-04-26 2005-06-08 Rohde & Schwarz GmbH & Co. KG Method for testing the error ratio of a device
JP4445160B2 (en) * 2001-05-18 2010-04-07 富士通株式会社 Events measuring apparatus and method, and event measurement program and computer readable recording medium and the processor system recorded the same program
WO2003096601A8 (en) 2002-05-08 2004-03-18 Uwe Baeder Method for testing the error ratio of a device using a preliminary probability
US7080294B1 (en) * 2002-05-10 2006-07-18 Sprint Spectrum L.P. Threshold crossing alarm system
US7051249B2 (en) * 2002-11-27 2006-05-23 Adc Dsl Systems, Inc. Analyzing a bit error rate of a communication link
US7234086B1 (en) 2003-01-16 2007-06-19 Pmc Sierra, Inc. Overlapping jumping window for SONET/SDH bit error rate monitoring
US7386767B1 (en) * 2004-10-05 2008-06-10 Altera Corporation Programmable bit error rate monitor for serial interface
CN101145871B (en) 2006-09-12 2012-06-06 中兴通讯股份有限公司 Method for reducing erroneous alarm generation sequence in SDH service

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4291403A (en) * 1979-05-22 1981-09-22 Rockwell International Corporation Digital implementation of parity monitor and alarm
NL7905968A (en) * 1979-08-03 1981-02-05 Philips Nv A method for detecting a digital code word, and code detector for carrying out the method.
JPH0377437A (en) * 1989-08-19 1991-04-03 Fujitsu Ltd Line switching system by transversal equalization
US5271011A (en) * 1992-03-16 1993-12-14 Scientific-Atlanta, Inc. Digital audio data muting system and method
JPH05298021A (en) * 1992-04-13 1993-11-12 Internatl Business Mach Corp <Ibm> Pointing device with cleaning alarm

Also Published As

Publication number Publication date Type
US5606563A (en) 1997-02-25 grant
CA2159763A1 (en) 1996-11-19 application

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