CA2114500A1 - Apparatus and method for cross-talk reduction - Google Patents
Apparatus and method for cross-talk reductionInfo
- Publication number
- CA2114500A1 CA2114500A1 CA002114500A CA2114500A CA2114500A1 CA 2114500 A1 CA2114500 A1 CA 2114500A1 CA 002114500 A CA002114500 A CA 002114500A CA 2114500 A CA2114500 A CA 2114500A CA 2114500 A1 CA2114500 A1 CA 2114500A1
- Authority
- CA
- Canada
- Prior art keywords
- connector
- traces
- circuit board
- printed circuit
- pairs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Abstract
APPARATUS AND METHOD FOR CROSS-TALK REDUCTION
ABSTRACT OF THE DISCLOSURE:
An electrical connector assembly connects plural sets of discrete electrical conductors arranged in plural pairs. A first set of conductors is terminated in a first connector. A second connector supports electrical contacts therein and is adapted to receive the first connector for effecting electrical connection between the first set of contacts and the electrical contacts of the second connector.
A printed circuit board (PCB) is adapted to accommodate the contacts of the second connector. Conductive traces on the PCB electrically connect the contacts to the first set of conductors. The PCB includes capacitance connecting selected PCB traces to one another to effect a reduction in cross talk interference as between the plural pairs of conductors.
ABSTRACT OF THE DISCLOSURE:
An electrical connector assembly connects plural sets of discrete electrical conductors arranged in plural pairs. A first set of conductors is terminated in a first connector. A second connector supports electrical contacts therein and is adapted to receive the first connector for effecting electrical connection between the first set of contacts and the electrical contacts of the second connector.
A printed circuit board (PCB) is adapted to accommodate the contacts of the second connector. Conductive traces on the PCB electrically connect the contacts to the first set of conductors. The PCB includes capacitance connecting selected PCB traces to one another to effect a reduction in cross talk interference as between the plural pairs of conductors.
Description
2 ~ 0 ~ ~
T&B 1083 PATENT
APP~RATUS AND METHOD FOR CROSS~TAhK REDUCI'ION
l FIELD OF THE INVENTION:
This invention relates ~enerally to electrical connectors and pertains more particularly to effecting electrical connections of plural conductor pairs -to user devices in environments where positive shielding of conductors is not an option.
BACKGROUND OF T~E INVENTION:
The electronics industry has long appreciated shielding of conductors as a quite effective tool for mutual isolation of electrical signals conveyed by single conductors or pairs of conductors. Thus, electrical conductors such as coaxial cables, i.e., single or plural conductors circumscribed by metallic, e.g., braided strands of metal, sheaths, are customarily used to avert so-called "cross talk" in connection assemblies. ~owever, various connection environments preclude the use of shielding measures, either based on space considerations or cost limitations.
By way of example, conventional telephone connection involves a jack member which terminates multiple pairs of telephone conductors, typically four in number.
Whilè shielding is not necessarily required in voice transmission, space limitation would in any event preclude its use in connectors of this type.
A conductor for data transmission having higher transmission frequencies may employ similar structure to a telephone connector. The jack has interiorly exposed contacts adapted to interface electrically directly with contacts exposed on the outer surface of the jack and the plug has dependent contact portions, electrically continuous with the exposed contacts and adapted to be seated in a printed circuit board (PcB) and electrically connected to conductive traces on the PCB which lead to further PCB-supported contacts adapted ~or interfacing connection to user apparatus. Such further PCB-suppor-ted contacts are ,~
Y~/ :
,................................ .
,................................ . .. .
",~^:. . ,, ., , ~
-,:,. . . .
, ,~ ~ . .
2 ~ 0 a 1 known to be of insulation~displacement contact (IDC) variety, whereby a connector having insulated conductors supported may simply be forced upon the PCB to effect the connection of user apparatus to the mated jack and plug.
Given the proximity of the four pairs, a signal on a given pair is couplecl onto another pair, both in the plug and in the jack member mated with the plug. Serious cross-talk problems arise, i.e., the signals intended to be uniquely transmitted on each pair are beclouded by cross~
talk interference from other pairs.
SUMMARY OF THE INVENTION~
The present invention has as its primary object the provision of improved cross talk reduction in electrical connection.
A particular object of the invention is to provide lessened cross talk interference in the described connection instance.
In attaining the foregoing and other objects, the invention provides apparatus for electrical interconnection of first and second sets of discrete electrical conductors arranged in respective plural pairs, the first conductor set being terminated in a first connector. A second connector is adapted for receipt of the first connector and for effecting electrical connection of the first conductor set to contacts of the second connector. A printed circuit board is adapted for the receipt of the contacts of the second connector and has condllctive traces thereon for electrical connection individually with the contacts of the second connector, the printed circuit board including capacitance connecting at least one contact of the second connector contacts with at least one o the conductive traces of capacitive measure effecting cross-talk reduction as between the plural conductor pairs. Connector means effects connection between the conductive traces and the second set of discrete electrical connectors.
~ ~ :
'': :' , .' ' . ' '.'~ '. ' ' . ' " ., 211~0V
1 The connector means is inclusive of contact elements resident in the printed circuit board and in electrical connection with the conductive traces and the contact elements are preferably of IDC variety.
The foregoing and other objects and features of the invention will be further understood from the following detailed description of preferred embodiments of the invention and from the drawin~s, wherein like reference numerals identify like parts and components throughout.
DESCRIPTION OF THE DRAWINGS:
Fig. 1 is a schematic illustration helpful in understanding further the problem addressed by the subject invention.
Fig. 2 is schematic illustration generally descriptive of the apparatus of the subject invention.
Fig. 3 is an electrical schematic of a first embodiment of apparatus in accordance with the subject invention.
Fig. 4 is a plan view of a first side of a PCB
20 having traces per the invention in its first embodiment. -Fig. 5 is a plan view of a second side of the Fig.
4 pCB.
Fig. 6 is an exploded view of a second embodiment of apparatus i.n accordance with the subject invention.
Fig. 7 is a schematic view of the arrangement of Fig. 6 as assembled.
DETAILED DESCRIPTION OF PREFERR~e_E~9~I~E~
The problem addressed by the subject invention will be appreciated by consideration of Fig. 1. Plug P
terminates conductor pairs P1 and P2, which comprise a first set of ~nshielded conductors. Jack J terminates a second , ! set o~f unshielded conductors having correspondence also with pairs P1 and P2. The plug and jack are mated along contact plane CP.
Assuming a high frequency signal SVAC to be being transmitted by conductor pair P1, and conductor pair P2 to ~,.,.,.... . ., . - .. ...... . . ... . ... .
~:,, . ,, ...... . ,.. , .-, ,, ~ . . .........
,.,:, , ~: . : ~ ::,' .. - .. ,......... - ..
",. . - - . ,........ . .",., . :
,", ~ . . ,:.:, .. : : : :
~,i . .:, . . . .
:,.: ,. . . .
*fJ~f~ f, f~
2 ~
be idle, signals are nonetheless induced in conductor pair P2, both in jack J and in plug P, i.e., cross~talk exists in the arrangement, with pair Pl being the culprit and pair 2 to be the victim.
The cross-talk, in decibels, can be expressed for the plug as -20 log ~VPXT/SVAC) and for the jack as -20 log (VJXT/SVAC). In a worst case situation, where the plug and jack cross-talk voltages are in-phase, the interference in pair P2 are at maximum, since the voltages are additive. The invention seeks particularly the reduction of such cross-talk interference thereby maximizing cross-talk loss. The term "cross-talk" represents the degree of reduction of loss from the amplitude of the culprit signal to the amplitude of the victim induced signal. It is desirable to have the victim induced signal to be as low as possible i.e. a high cross-talk loss.
Turning to Figs. 2 and 3, plug lO terminates conductors 1-8(first set of discrete electrical conductors) which are assigned into four parts, namely Pair l, Pair 2, Pair 3 and Pair 4. As is seen, Pair l comprises conductors 4 and 5, Pair 2 comprises conductors l and 2, Pair 3 comprises conductors 3 and 6 and Pair 4 comprises conductors 7 and 8, per industry standards.
Plug lO nests in a recess (not shown) in jack 12 and connection plane CPl represents the connections of conductors 1-8 to counterpart jack conductors extending to connection locus CLl which, although shown as being a single connection plane for convenience, will be seen hereinafter to be a plural connection plane arrangement, again per industry standards.
PCB l4 has facility for receiving the jack conductors and for electrical connection to traces thereon extending from connection locus CLl to capacitive PCB network CPCBNW, the details of which are below discussed in connection with Figs. 3, ~ and 5. DIP (dual in place) connector, hereinafter DIP, 18 includes contacts connection VLS~
,'~"
,'.."",'; . ' : , "~,, .
211~5~0 -4a-wi~h Figs. 3, 4 and 5. DIP 1~ includes contacts Kl-K8, desirably of IDC variety, adapted for seating in PCB pads connected to the PCB traces of capacitive PCB network CPCBNW
16. DIP 18 embodies discrete conductors 1'-8' (second set of discrete electrical conductors) which ..
VLS:jj "~" ~ , ~ , ' ' '' ': , : , _5_ 2114~0 1 are forced by the DIP cover, below discussed, into electrical engagement with contacts K1-K8, and serve as output conductors of the Fig. 2 apparatus.
Turning to Fig. 4, it shows one side of PCB 14 and s depicts connection locus cLl, as aforesaid in two planes vertical to the PCB. Traces T1, T2, T3 and T6 connect jack Pair 2 and jack Pair 3 from connection locus CL1 to PCB pads PD 1, PD 2, PD 3 and PD 6, respectively. Such traces, in combination with capacitors C1 and C2, constitute a first part of capacitive PCB network CPCBNW 16 of Fig. 2.
Referring now to Fig. 5, it shows the surface of PCB 14 opposite to the one side of Fig. ~ and depicts, in addition to connection locus CL1, traces T4, T5, T7 and T8.
Through CL1, these traces connect jack Pair 1 and jack Pair 4 conductors to PCB pads PD 4, PD 5, PD 7 and PD 8, respectively. Such traces, in combination with capacitors C1 and C2, constitute a second part of CPCBNW 16 of Fig. 2.
From Figs. 3, 4 and 5, it will be seen that capacitor Cl interconnects trace T5 to trace T2, i.e., bridges a conductor of jack conductor Pair 1 and jack conductor Pair 2. Capacitor C2 interconnects trace T4 to trace T6, i.e., bridges a conductor of jack conductor Pair 1 and jack conductor Pair 3.
DIP contacts Kl-K8 are seated in PCB pads PDl-PD-8 and electrically secured therewith.
In selecting a value for capacitor Cl, per the invention, a signal is applied to either of plug conductor pairs 1 or 2, with the unselected pair being idle, i.e., without signals applied thereto. C1 is now set such that voltage appearing on the unselected pair, as measured, e.g., across the corresponding output conductors in conductors 1'-8' (Fig. 2), is minimized. Thus, the premise of the invention is to introduce selec-tive phase-shifting of the induced, cross-talk signal, in the victim jack conductor pair, such that it is out-of-phase with the induced, cross-talk signal in the victim plug conductor pair. In testing for cross-talk the victim pair is idle. However in actual ' ~,:' ,~,., . ", .. .
-6- 2114~0 1 use the victim pair will carry its own signal. The cross-talk signal will add or subtract from the signal carried by the victim. ~,ike practice attends the selection of a capacitive value for capacitor C2, with the applied signal being on plug conductor Pair 1 and the idle (victim) conductor pair being monitored for minimum induced voltage between conductors 3' and 6' of Fig. 2.
The embodiment discussed to this juncture involves a single plug and jack combination. In the exploded view of Fig. 6, the invention is embodied in apparatus involving plural jack and plug combinations.
Referring to Fig. 6, housing 20 is a rigid plastic member defining slots 22 and 2~ for seating therein of PCB
26. Housing 20 further defines openings 28 and 30 for providing access to jacks 32 and 34, which are seated in PCB
26 and electrically connected with races of the PCB in manner above discussed for the first embodiment. DIPs 36 and 38 have their bases secured to PCB 26 and their contacts electrically connected with PCB traces. the surface of PCB
20 26 facing the DIPs 36 and 38 has the trace pattern of Fig.
5 in plural, side-by-side relationship. The other, opposite surface of PCB 26 has the trace pattern of Fig. 4 in plural, side-by-side relationship. Capacitor pairs 40, 42 and 44, 46 are connected to the traces of PCB 26 as above discussed for capacitors C1 and C2.
Housing 20 is shown in assembly with its related components (except for the trace patterns on PCB 26) in the plan view of Fig. 7 which depicts latch member 48, which is cantilever-supported such that its free end bearing detent 50 can serve to mount the housing in a panel. Latch member 52 (Fig. 6) is likewise configured and disposed in alignment with latch member 48.
In use of the apparatus of Figs. 6 and 7, DIP
covers 54, 56, 58 and 60 are removed from the DIP bases 62 and 64 and conductors (not shown) are applied to the DIP
contacts. The contacts are preferably of IDC variety and :, ...
~ ' . ~ ', ' . " .; , , , _7_ 211~5~0 1 the DIP covers are applied to effect displacement of the conductors into electrical engagement with the contacts.
With the conductors, so terminated and connected to desired associated equipment, plugs ~not shown) having conductors thereof connected to other desired associated e~uipment are inserted into housing openings 28 and 30 into connection with jacks 32 and 3~
While, in the foregoing, the DIP base and contacts are assembled with the PCB prior to termination of the second set conductors, the invention of course contemplates that the second set conductors be pre-terminated in the DIP
and that the DIP then be connected with the PCB.
As wi~,l be seen, in addition to the described apparatus, the invention provides a method for effecting cross-talk reduction as between first and second sets of discrete electrical conductors arranged in respective plural pairs, the first conductor set being terminated in a first (plug) connector having output contacts, said second connector set being terminated in another (DIP~ connector having input contacts. ~he steps of the method include~
configuring a further (jack) connector for receipt of the first connector and with contacts for electrical connection with the first connector output-contacts and mating the first and further connectors; configuring a printed circuit board with traces .corresponding in number to number of conductors in the first set: of discrete electr;.cal conductors and with means for electrical connection of the traces to the further connector contacts and to the other (DIP) connector input contacts and effecting both such electrical connections, and providing capacitive coupling between at least one of the conductive traces and another of said conductive traces, the capacitance being selected to be of capacitive measure effecting cross talk reduction as between conductor pairs.
Various changes in structure to the described apparatus may evidently be introduced without departing from the invention. By way of example, while the phase-shifting ., ,', !, ,,,. ~ , ' ri" . ~ :
:~: '': ' : . , ' , , .
-8- 2 1 1 4 ~ 0 0 l in the above preferred embodiments is achieved by discrete capacitors, the invention contemplates realizing the required capacitance for cross talk minimization in other manner, such as obtaining such capacitance from distributed and/or stray capacitance derived from appropriate disposition of the PCB traces. Accordingly, it is to be understood that the particularly disclosed and depicted embodiment is intended in an illustrative and not in a limiting sense. ~he true spirit and scope of the invention are set forth in the following claims.
, :
-~s,., ~. " , :'"' ' ' ' ' ~" ' ' ,,~,
T&B 1083 PATENT
APP~RATUS AND METHOD FOR CROSS~TAhK REDUCI'ION
l FIELD OF THE INVENTION:
This invention relates ~enerally to electrical connectors and pertains more particularly to effecting electrical connections of plural conductor pairs -to user devices in environments where positive shielding of conductors is not an option.
BACKGROUND OF T~E INVENTION:
The electronics industry has long appreciated shielding of conductors as a quite effective tool for mutual isolation of electrical signals conveyed by single conductors or pairs of conductors. Thus, electrical conductors such as coaxial cables, i.e., single or plural conductors circumscribed by metallic, e.g., braided strands of metal, sheaths, are customarily used to avert so-called "cross talk" in connection assemblies. ~owever, various connection environments preclude the use of shielding measures, either based on space considerations or cost limitations.
By way of example, conventional telephone connection involves a jack member which terminates multiple pairs of telephone conductors, typically four in number.
Whilè shielding is not necessarily required in voice transmission, space limitation would in any event preclude its use in connectors of this type.
A conductor for data transmission having higher transmission frequencies may employ similar structure to a telephone connector. The jack has interiorly exposed contacts adapted to interface electrically directly with contacts exposed on the outer surface of the jack and the plug has dependent contact portions, electrically continuous with the exposed contacts and adapted to be seated in a printed circuit board (PcB) and electrically connected to conductive traces on the PCB which lead to further PCB-supported contacts adapted ~or interfacing connection to user apparatus. Such further PCB-suppor-ted contacts are ,~
Y~/ :
,................................ .
,................................ . .. .
",~^:. . ,, ., , ~
-,:,. . . .
, ,~ ~ . .
2 ~ 0 a 1 known to be of insulation~displacement contact (IDC) variety, whereby a connector having insulated conductors supported may simply be forced upon the PCB to effect the connection of user apparatus to the mated jack and plug.
Given the proximity of the four pairs, a signal on a given pair is couplecl onto another pair, both in the plug and in the jack member mated with the plug. Serious cross-talk problems arise, i.e., the signals intended to be uniquely transmitted on each pair are beclouded by cross~
talk interference from other pairs.
SUMMARY OF THE INVENTION~
The present invention has as its primary object the provision of improved cross talk reduction in electrical connection.
A particular object of the invention is to provide lessened cross talk interference in the described connection instance.
In attaining the foregoing and other objects, the invention provides apparatus for electrical interconnection of first and second sets of discrete electrical conductors arranged in respective plural pairs, the first conductor set being terminated in a first connector. A second connector is adapted for receipt of the first connector and for effecting electrical connection of the first conductor set to contacts of the second connector. A printed circuit board is adapted for the receipt of the contacts of the second connector and has condllctive traces thereon for electrical connection individually with the contacts of the second connector, the printed circuit board including capacitance connecting at least one contact of the second connector contacts with at least one o the conductive traces of capacitive measure effecting cross-talk reduction as between the plural conductor pairs. Connector means effects connection between the conductive traces and the second set of discrete electrical connectors.
~ ~ :
'': :' , .' ' . ' '.'~ '. ' ' . ' " ., 211~0V
1 The connector means is inclusive of contact elements resident in the printed circuit board and in electrical connection with the conductive traces and the contact elements are preferably of IDC variety.
The foregoing and other objects and features of the invention will be further understood from the following detailed description of preferred embodiments of the invention and from the drawin~s, wherein like reference numerals identify like parts and components throughout.
DESCRIPTION OF THE DRAWINGS:
Fig. 1 is a schematic illustration helpful in understanding further the problem addressed by the subject invention.
Fig. 2 is schematic illustration generally descriptive of the apparatus of the subject invention.
Fig. 3 is an electrical schematic of a first embodiment of apparatus in accordance with the subject invention.
Fig. 4 is a plan view of a first side of a PCB
20 having traces per the invention in its first embodiment. -Fig. 5 is a plan view of a second side of the Fig.
4 pCB.
Fig. 6 is an exploded view of a second embodiment of apparatus i.n accordance with the subject invention.
Fig. 7 is a schematic view of the arrangement of Fig. 6 as assembled.
DETAILED DESCRIPTION OF PREFERR~e_E~9~I~E~
The problem addressed by the subject invention will be appreciated by consideration of Fig. 1. Plug P
terminates conductor pairs P1 and P2, which comprise a first set of ~nshielded conductors. Jack J terminates a second , ! set o~f unshielded conductors having correspondence also with pairs P1 and P2. The plug and jack are mated along contact plane CP.
Assuming a high frequency signal SVAC to be being transmitted by conductor pair P1, and conductor pair P2 to ~,.,.,.... . ., . - .. ...... . . ... . ... .
~:,, . ,, ...... . ,.. , .-, ,, ~ . . .........
,.,:, , ~: . : ~ ::,' .. - .. ,......... - ..
",. . - - . ,........ . .",., . :
,", ~ . . ,:.:, .. : : : :
~,i . .:, . . . .
:,.: ,. . . .
*fJ~f~ f, f~
2 ~
be idle, signals are nonetheless induced in conductor pair P2, both in jack J and in plug P, i.e., cross~talk exists in the arrangement, with pair Pl being the culprit and pair 2 to be the victim.
The cross-talk, in decibels, can be expressed for the plug as -20 log ~VPXT/SVAC) and for the jack as -20 log (VJXT/SVAC). In a worst case situation, where the plug and jack cross-talk voltages are in-phase, the interference in pair P2 are at maximum, since the voltages are additive. The invention seeks particularly the reduction of such cross-talk interference thereby maximizing cross-talk loss. The term "cross-talk" represents the degree of reduction of loss from the amplitude of the culprit signal to the amplitude of the victim induced signal. It is desirable to have the victim induced signal to be as low as possible i.e. a high cross-talk loss.
Turning to Figs. 2 and 3, plug lO terminates conductors 1-8(first set of discrete electrical conductors) which are assigned into four parts, namely Pair l, Pair 2, Pair 3 and Pair 4. As is seen, Pair l comprises conductors 4 and 5, Pair 2 comprises conductors l and 2, Pair 3 comprises conductors 3 and 6 and Pair 4 comprises conductors 7 and 8, per industry standards.
Plug lO nests in a recess (not shown) in jack 12 and connection plane CPl represents the connections of conductors 1-8 to counterpart jack conductors extending to connection locus CLl which, although shown as being a single connection plane for convenience, will be seen hereinafter to be a plural connection plane arrangement, again per industry standards.
PCB l4 has facility for receiving the jack conductors and for electrical connection to traces thereon extending from connection locus CLl to capacitive PCB network CPCBNW, the details of which are below discussed in connection with Figs. 3, ~ and 5. DIP (dual in place) connector, hereinafter DIP, 18 includes contacts connection VLS~
,'~"
,'.."",'; . ' : , "~,, .
211~5~0 -4a-wi~h Figs. 3, 4 and 5. DIP 1~ includes contacts Kl-K8, desirably of IDC variety, adapted for seating in PCB pads connected to the PCB traces of capacitive PCB network CPCBNW
16. DIP 18 embodies discrete conductors 1'-8' (second set of discrete electrical conductors) which ..
VLS:jj "~" ~ , ~ , ' ' '' ': , : , _5_ 2114~0 1 are forced by the DIP cover, below discussed, into electrical engagement with contacts K1-K8, and serve as output conductors of the Fig. 2 apparatus.
Turning to Fig. 4, it shows one side of PCB 14 and s depicts connection locus cLl, as aforesaid in two planes vertical to the PCB. Traces T1, T2, T3 and T6 connect jack Pair 2 and jack Pair 3 from connection locus CL1 to PCB pads PD 1, PD 2, PD 3 and PD 6, respectively. Such traces, in combination with capacitors C1 and C2, constitute a first part of capacitive PCB network CPCBNW 16 of Fig. 2.
Referring now to Fig. 5, it shows the surface of PCB 14 opposite to the one side of Fig. ~ and depicts, in addition to connection locus CL1, traces T4, T5, T7 and T8.
Through CL1, these traces connect jack Pair 1 and jack Pair 4 conductors to PCB pads PD 4, PD 5, PD 7 and PD 8, respectively. Such traces, in combination with capacitors C1 and C2, constitute a second part of CPCBNW 16 of Fig. 2.
From Figs. 3, 4 and 5, it will be seen that capacitor Cl interconnects trace T5 to trace T2, i.e., bridges a conductor of jack conductor Pair 1 and jack conductor Pair 2. Capacitor C2 interconnects trace T4 to trace T6, i.e., bridges a conductor of jack conductor Pair 1 and jack conductor Pair 3.
DIP contacts Kl-K8 are seated in PCB pads PDl-PD-8 and electrically secured therewith.
In selecting a value for capacitor Cl, per the invention, a signal is applied to either of plug conductor pairs 1 or 2, with the unselected pair being idle, i.e., without signals applied thereto. C1 is now set such that voltage appearing on the unselected pair, as measured, e.g., across the corresponding output conductors in conductors 1'-8' (Fig. 2), is minimized. Thus, the premise of the invention is to introduce selec-tive phase-shifting of the induced, cross-talk signal, in the victim jack conductor pair, such that it is out-of-phase with the induced, cross-talk signal in the victim plug conductor pair. In testing for cross-talk the victim pair is idle. However in actual ' ~,:' ,~,., . ", .. .
-6- 2114~0 1 use the victim pair will carry its own signal. The cross-talk signal will add or subtract from the signal carried by the victim. ~,ike practice attends the selection of a capacitive value for capacitor C2, with the applied signal being on plug conductor Pair 1 and the idle (victim) conductor pair being monitored for minimum induced voltage between conductors 3' and 6' of Fig. 2.
The embodiment discussed to this juncture involves a single plug and jack combination. In the exploded view of Fig. 6, the invention is embodied in apparatus involving plural jack and plug combinations.
Referring to Fig. 6, housing 20 is a rigid plastic member defining slots 22 and 2~ for seating therein of PCB
26. Housing 20 further defines openings 28 and 30 for providing access to jacks 32 and 34, which are seated in PCB
26 and electrically connected with races of the PCB in manner above discussed for the first embodiment. DIPs 36 and 38 have their bases secured to PCB 26 and their contacts electrically connected with PCB traces. the surface of PCB
20 26 facing the DIPs 36 and 38 has the trace pattern of Fig.
5 in plural, side-by-side relationship. The other, opposite surface of PCB 26 has the trace pattern of Fig. 4 in plural, side-by-side relationship. Capacitor pairs 40, 42 and 44, 46 are connected to the traces of PCB 26 as above discussed for capacitors C1 and C2.
Housing 20 is shown in assembly with its related components (except for the trace patterns on PCB 26) in the plan view of Fig. 7 which depicts latch member 48, which is cantilever-supported such that its free end bearing detent 50 can serve to mount the housing in a panel. Latch member 52 (Fig. 6) is likewise configured and disposed in alignment with latch member 48.
In use of the apparatus of Figs. 6 and 7, DIP
covers 54, 56, 58 and 60 are removed from the DIP bases 62 and 64 and conductors (not shown) are applied to the DIP
contacts. The contacts are preferably of IDC variety and :, ...
~ ' . ~ ', ' . " .; , , , _7_ 211~5~0 1 the DIP covers are applied to effect displacement of the conductors into electrical engagement with the contacts.
With the conductors, so terminated and connected to desired associated equipment, plugs ~not shown) having conductors thereof connected to other desired associated e~uipment are inserted into housing openings 28 and 30 into connection with jacks 32 and 3~
While, in the foregoing, the DIP base and contacts are assembled with the PCB prior to termination of the second set conductors, the invention of course contemplates that the second set conductors be pre-terminated in the DIP
and that the DIP then be connected with the PCB.
As wi~,l be seen, in addition to the described apparatus, the invention provides a method for effecting cross-talk reduction as between first and second sets of discrete electrical conductors arranged in respective plural pairs, the first conductor set being terminated in a first (plug) connector having output contacts, said second connector set being terminated in another (DIP~ connector having input contacts. ~he steps of the method include~
configuring a further (jack) connector for receipt of the first connector and with contacts for electrical connection with the first connector output-contacts and mating the first and further connectors; configuring a printed circuit board with traces .corresponding in number to number of conductors in the first set: of discrete electr;.cal conductors and with means for electrical connection of the traces to the further connector contacts and to the other (DIP) connector input contacts and effecting both such electrical connections, and providing capacitive coupling between at least one of the conductive traces and another of said conductive traces, the capacitance being selected to be of capacitive measure effecting cross talk reduction as between conductor pairs.
Various changes in structure to the described apparatus may evidently be introduced without departing from the invention. By way of example, while the phase-shifting ., ,', !, ,,,. ~ , ' ri" . ~ :
:~: '': ' : . , ' , , .
-8- 2 1 1 4 ~ 0 0 l in the above preferred embodiments is achieved by discrete capacitors, the invention contemplates realizing the required capacitance for cross talk minimization in other manner, such as obtaining such capacitance from distributed and/or stray capacitance derived from appropriate disposition of the PCB traces. Accordingly, it is to be understood that the particularly disclosed and depicted embodiment is intended in an illustrative and not in a limiting sense. ~he true spirit and scope of the invention are set forth in the following claims.
, :
-~s,., ~. " , :'"' ' ' ' ' ~" ' ' ,,~,
Claims (12)
1. Apparatus for electrical interconnection of first and second sets of discrete electrical conductors arranged in respective plural conductor pairs, said apparatus comprising:
(a) a first connector terminating said first conductor set;
(b) a second connector adapted for receipt of said first connector and effecting electrical connection of said first conductor set to contacts of said second connector;
(c) a printed circuit board having pairs of electrically conductive traces corresponding to said respective plural conductor pairs, said pairs of electrically conductive traces being disposed on respective opposite sides of said printed circuit board, each contact of said second connector being in electrical connection with a distinct one of said traces, each of said traces defining a terminal distal from said contacts of said second connector, said printed circuit board including capacitance therewith between traces corresponding respectively to different ones of said plural conductor pairs and of capacitive measure effecting cross-talk reduction as between said different ones of said plural conductor pairs; and (d) connector means for effecting connection between said terminals of said traces and said second set of discrete electrical conductors.
(a) a first connector terminating said first conductor set;
(b) a second connector adapted for receipt of said first connector and effecting electrical connection of said first conductor set to contacts of said second connector;
(c) a printed circuit board having pairs of electrically conductive traces corresponding to said respective plural conductor pairs, said pairs of electrically conductive traces being disposed on respective opposite sides of said printed circuit board, each contact of said second connector being in electrical connection with a distinct one of said traces, each of said traces defining a terminal distal from said contacts of said second connector, said printed circuit board including capacitance therewith between traces corresponding respectively to different ones of said plural conductor pairs and of capacitive measure effecting cross-talk reduction as between said different ones of said plural conductor pairs; and (d) connector means for effecting connection between said terminals of said traces and said second set of discrete electrical conductors.
2. The apparatus claimed in claim 1 wherein said capacitance is provided by a capacitor interconnecting said traces corresponding respectively to different ones of said plural conductor pairs disposed on respective opposite sides of said printed circuit board.
3. The apparatus claimed in claim 1 wherein said capacitance is provided by plural capacitors, each interconnecting said traces corresponding respectively to different ones of said plural conductor pairs.
4. The apparatus claimed in claim 3 wherein said capacitors are disposed on one surface of said printed circuit board, each interconnecting traces on said respective opposed surfaces of said printed circuit board.
5. Apparatus for electrical interconnection of first and second sets of discrete electrical conductors arranged in respective plural conductor pairs, said apparatus comprising:
(a) a first connector terminating said first conductor set;
(b) a second connector adapted for receipt of said first connector and effecting electrical connection of said first conductor set to contacts of said second connector;
(c) a printed circuit board having pairs of electrical conductive traces corresponding to said respective plural conductor pairs, said pairs of electrically conductive traces being disposed on respective opposite sides of printed circuit board, each contact of said second connector being in electrical connection with a distinct one of said traces, each of said traces defining a terminal distal from said contacts of said second connector;
(d) a capacitor disposed on said printed circuit board and connecting traces corresponding respectively to different ones of said plural conductor pairs and of capacitive measure effecting cross-talk reduction as between said different ones of said plural conductor pairs; and (e) connector means for effecting connection between said terminals of said traces and said second set of discrete electrical conductors.
(a) a first connector terminating said first conductor set;
(b) a second connector adapted for receipt of said first connector and effecting electrical connection of said first conductor set to contacts of said second connector;
(c) a printed circuit board having pairs of electrical conductive traces corresponding to said respective plural conductor pairs, said pairs of electrically conductive traces being disposed on respective opposite sides of printed circuit board, each contact of said second connector being in electrical connection with a distinct one of said traces, each of said traces defining a terminal distal from said contacts of said second connector;
(d) a capacitor disposed on said printed circuit board and connecting traces corresponding respectively to different ones of said plural conductor pairs and of capacitive measure effecting cross-talk reduction as between said different ones of said plural conductor pairs; and (e) connector means for effecting connection between said terminals of said traces and said second set of discrete electrical conductors.
6. The apparatus claimed in claim 5 wherein said capacitor is disposed on one surface of said printed circuit board and interconnects traces on said respective opposed surfaces of said printed circuit board.
7. The apparatus claimed in claim 5 wherein there are plural capacitors, each capacitor interconnecting said traces corresponding respectively to different ones of said plural conductor pairs.
8. The apparatus claimed in claim 7 wherein said capacitors are disposed on one surface of said printed circuit board, each interconnecting traces on said respective opposed surfaces of said printed circuit board.
9. Apparatus for electrical interconnection of first and second sets of discrete electrical conductors arranged in four distinct conductor pairs, said apparatus comprising:
(a) a first connector terminating said first conductor set;
(b) a second connector adapted for receipt of said first connector and effecting electrical connection of said first conductor set to contacts of said second connector;
(c) a printed circuit board having first, second, third and fourth pairs of electrically conductive traces, said first and second pairs being on one side of said printed circuit board and said third and fourth pairs being on a side of said printed circuit board opposite to said first side, each contact of said second connector being in electrical connection with a distinct one of said traces, each of said traces defining a terminal distal from said contacts of said connector;
(d) first and second capacitors disposed on said printed circuit board and connecting traces corresponding respectively to said first and third conductor pairs and of said second and third conductor pairs and of capacitive measure effecting cross-talk reduction as between said conductor pairs; and (e) connector means for effecting connection between said terminals of said traces and said second set of discrete electrical conductors.
(a) a first connector terminating said first conductor set;
(b) a second connector adapted for receipt of said first connector and effecting electrical connection of said first conductor set to contacts of said second connector;
(c) a printed circuit board having first, second, third and fourth pairs of electrically conductive traces, said first and second pairs being on one side of said printed circuit board and said third and fourth pairs being on a side of said printed circuit board opposite to said first side, each contact of said second connector being in electrical connection with a distinct one of said traces, each of said traces defining a terminal distal from said contacts of said connector;
(d) first and second capacitors disposed on said printed circuit board and connecting traces corresponding respectively to said first and third conductor pairs and of said second and third conductor pairs and of capacitive measure effecting cross-talk reduction as between said conductor pairs; and (e) connector means for effecting connection between said terminals of said traces and said second set of discrete electrical conductors.
10. The apparatus claimed in claim 9 wherein said capacitors are disposed on said one surface of said printed circuit board.
11. The apparatus claimed in claim 9 wherein said printed circuit board is elongate and wherein said terminals of said traces are arranged in longitudinal succession thereon.
12. The apparatus claimed in claim 11, wherein ends of said traces connected to said contacts of said second connector are arranged in respective first and second rows transversely of said printed circuit board.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US1102093A | 1993-01-29 | 1993-01-29 | |
| US011,020 | 1993-01-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2114500A1 true CA2114500A1 (en) | 1994-07-30 |
Family
ID=21748510
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002114500A Abandoned CA2114500A1 (en) | 1993-01-29 | 1994-01-28 | Apparatus and method for cross-talk reduction |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPH076836A (en) |
| CA (1) | CA2114500A1 (en) |
| IL (1) | IL108474A0 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104518387A (en) * | 2013-09-27 | 2015-04-15 | 联咏科技股份有限公司 | Distribution method, electronic apparatus and connector |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0674364B1 (en) * | 1994-03-26 | 1999-11-24 | Molex Incorporated | Modular jack type connector |
-
1994
- 1994-01-28 CA CA002114500A patent/CA2114500A1/en not_active Abandoned
- 1994-01-30 IL IL10847494A patent/IL108474A0/en unknown
- 1994-01-31 JP JP6010070A patent/JPH076836A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104518387A (en) * | 2013-09-27 | 2015-04-15 | 联咏科技股份有限公司 | Distribution method, electronic apparatus and connector |
| CN104518387B (en) * | 2013-09-27 | 2018-03-13 | 联咏科技股份有限公司 | Wiring method, electronic installation and connector |
Also Published As
| Publication number | Publication date |
|---|---|
| IL108474A0 (en) | 1994-04-12 |
| JPH076836A (en) | 1995-01-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6113400A (en) | Modular plug having compensating insert | |
| US7140924B2 (en) | Compensation system and method for negative capacitive coupling in IDC | |
| US5864089A (en) | Low-crosstalk modular electrical connector assembly | |
| US6244908B1 (en) | Switch within a data connector jack | |
| US5108294A (en) | Terminator connector | |
| US6394853B1 (en) | Data connector for selective switching between at least two distinct mating connector plugs | |
| US5967828A (en) | Modular plug for high speed data transmission | |
| US6592395B2 (en) | In-line cable connector assembly | |
| US7038554B2 (en) | Crosstalk compensation with balancing capacitance system and method | |
| US6007368A (en) | Telecommunications connector with improved crosstalk reduction | |
| US5679027A (en) | Apparatus for crosstalk cancellation in data connectors | |
| US6165018A (en) | Connector having internal crosstalk compensation | |
| US20070270044A1 (en) | High Speed Modular Jack | |
| US5399106A (en) | High performance electrical connector | |
| US20070270034A1 (en) | High Speed Modular Jack | |
| US5340333A (en) | Shielded modular adapter | |
| US7261592B2 (en) | Electrical connector | |
| US5509812A (en) | Cable tap assembly | |
| EP0993081A2 (en) | Modular connector with capacitive plates | |
| US20020130728A1 (en) | Electrical connector and transmission line | |
| JP2000505601A (en) | Non-resistive energy coupling for crosstalk reduction | |
| US6816025B2 (en) | Cross talk compensation circuit | |
| CA2114500A1 (en) | Apparatus and method for cross-talk reduction | |
| US11888255B2 (en) | Single pair ethernet connector | |
| CA2987615C (en) | Rj45 connector |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FZDE | Discontinued | ||
| FZDE | Discontinued |
Effective date: 19960728 |