CA1190126A - High mobility amorphous silicon displaying non- dispersive transport properties - Google Patents
High mobility amorphous silicon displaying non- dispersive transport propertiesInfo
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- CA1190126A CA1190126A CA000376096A CA376096A CA1190126A CA 1190126 A CA1190126 A CA 1190126A CA 000376096 A CA000376096 A CA 000376096A CA 376096 A CA376096 A CA 376096A CA 1190126 A CA1190126 A CA 1190126A
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- amorphous silicon
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- silane
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Abstract
ABSTRACT OF THE DISCLOSURE
The present invention teaches a combination of parameters for the glow discharge decomposition of silane deposition of an amorphous silicon semiconductor having non-dispersive high mobility transport of majority carriers through the semiconductor material, useful in switching devices such as diodes, transistors and the like.
The present invention teaches a combination of parameters for the glow discharge decomposition of silane deposition of an amorphous silicon semiconductor having non-dispersive high mobility transport of majority carriers through the semiconductor material, useful in switching devices such as diodes, transistors and the like.
Description
l ~IEI~ OE THE INVENTION
2 The present invention relates to amorphous semi-
3 conductor materials, and in particular, to an amorphous silicon semiconductor havlng increased ~ajOri~y carrier 5 mobili~y.
6 BA~RGROUND OF T~IE lNV~NLlON
7 The ~ast majority of semiconductor devices such 8 as diodes, transistors and the like utilize a body of crys-9 tallin2 semiconductor material such as silicon and germanium, 10 principally in their single crystaL form. Single crystal silicon7 though very costly7 is the primary semiconductor 12 material for ,he elec~ronic device industry. Single crys-13 tal semiconduc~or materlals such as silicon display a 14 highly symmetrical well-ordered atomic structure resul~ing 15 in favorable basic electronic properties.
16 A collective description of the interrelationship 17 of several of the basic properties is referred to in the 18 art as the semiconductor's transport properties. Trans^
19 port properties generally define the abiLity of the semi-20 conductor material to move a generated or injected charge 21 carrier through the material. One of the more important 22 components of a material's transport properties is the 23 mobility of the charge carriers~ Broadly defined, the 24 mobility determines the rate at which an electron (or hole) 25 will migrate through the semiconductor material under the 25 influence of a given electric field. More particularly, 27 it is the velocity with which the carrier (hole or electron) 28 moves through the material per ~nit applied field~ express-29 able as v=~E where v is the velocity, ~ is the mobility, 30 and E is the electric field. Embodied in a semiconductor 31 device SllCh as a fleld effect transistor, the mobility is 32 an important factor in determining the switching time of 33 the de~ice.
~' ~ 2 ~
l In the ~7ell~0rdered atomic structure of single 2 crystal silicon or similar such material, a generated or 3 injected charge carrier will traveL rapidly through the
6 BA~RGROUND OF T~IE lNV~NLlON
7 The ~ast majority of semiconductor devices such 8 as diodes, transistors and the like utilize a body of crys-9 tallin2 semiconductor material such as silicon and germanium, 10 principally in their single crystaL form. Single crystal silicon7 though very costly7 is the primary semiconductor 12 material for ,he elec~ronic device industry. Single crys-13 tal semiconduc~or materlals such as silicon display a 14 highly symmetrical well-ordered atomic structure resul~ing 15 in favorable basic electronic properties.
16 A collective description of the interrelationship 17 of several of the basic properties is referred to in the 18 art as the semiconductor's transport properties. Trans^
19 port properties generally define the abiLity of the semi-20 conductor material to move a generated or injected charge 21 carrier through the material. One of the more important 22 components of a material's transport properties is the 23 mobility of the charge carriers~ Broadly defined, the 24 mobility determines the rate at which an electron (or hole) 25 will migrate through the semiconductor material under the 25 influence of a given electric field. More particularly, 27 it is the velocity with which the carrier (hole or electron) 28 moves through the material per ~nit applied field~ express-29 able as v=~E where v is the velocity, ~ is the mobility, 30 and E is the electric field. Embodied in a semiconductor 31 device SllCh as a fleld effect transistor, the mobility is 32 an important factor in determining the switching time of 33 the de~ice.
~' ~ 2 ~
l In the ~7ell~0rdered atomic structure of single 2 crystal silicon or similar such material, a generated or 3 injected charge carrier will traveL rapidly through the
4 material displaying majority carrier mobility as high as l~OQ0 cm2/v-sec. I~ese crystalline ma~erials are generall~
6 free of loeallzed trapping s~ates in the energy gap result-7 ~ng i~ an Im interfered transit of the charge carriers 8 through the material. If a planar dis~ri'oution of charge 9 carriers is injected into the aforedescribed high mobility semiconductor~ these ch~rge carriers would (under ~he in-11 fluence of an electric field) drift uniformly through the 12 semiconductor in a coherent Gaussian packet5 which packet 13 would be broadened only by diffusive spreading of the in-14 jected charge packet. Fur~hermore, ~he time required for the center of said charge pac~et to travel a specified 16 distance is inversely proportional to the field in the 17 ma~erial~ provided the field is uniform. This coherent 18 transport of charge carriers, undominated by localized l9 states within the semiconductor~ is conven~ionally referred 20 to as non dispersive transport. As those of the art read 21 ily recogniæe9 semiconductor materials in ~heir natural 22 state do no~ typically display such favorable electronic 23 characteristics~ In the case of single crystals 7 silicon 24 and germanium required extensive research before th~ pro-cessing techniques produced such an electronically favor-26 able semiconductor material. Those of the art will fllrther 27 recogni~e that the property lnfluencing techniques ror 28 altering semiconductor materials are unique to each in-29 dividual material.
A relatively new and pioneering field of the 31 semiconductor industry is amorphous semiconductor mater-32 ials. Unlike their ordered single-crystal counterparts, 33 amorphous semiconductor materials display no long range 34 order. This intrinsic lac~ of order had conventionally 35 been considered severely de~rimental to the electronic 36 transport properties and in particular to mobility of 37 charge carriers. Those of the art had initially considered 1 thls a fundamental obstacle in using such materials in 2 semiconductor applicationsO Amorphous semiconductor m2t-3 erials normally display a substantial density,of localized 4 states in the energy gap. These states are conven~ionall~
divided into two categories depending on their location in 6 the energy gap and their resultant effect on the transport 7 properties of ~he semiconductor materials. ~ ~irst ca~e-8 gory may be defined as shallow sta~es (less than about 0.29 ev from the band edge) which exhi~its relatively short lo trapping time (less than or equal to about 10-9 seconds).
11 These shallow states are gPnerally attributed to fluctua-12 tions in the local potentials. A second category may be 13 generally referred to as deep states. These states are 14 typically greater than about 002 ev from the band edge and trap charge carriers for a relatively long period of time 16 (greater than 10-9 sec.). The term trapping, as known to 17 those in the art~ refers to the influence of the localized 18 s~ates upon a charge carrierO Deep states are generalLy 19 attribute~ to impurities or gross defects in the amorphous semiconduc~or lattice such as unsatisfied or dangling bonds.
21 Since trapping and detrapping events in shallow 22 states are short relative to a cha,ge carrier transit time 23 over dis~ances likely to ~e involved in a semiconductor 24 device (grea~er than 1 micron and less than 100 microns~, their general effect is to produce only a net lowering of 26 the mobility and will not alter othen~ise non-dispersive 27 ~ransport properties of a semiconduc~or materiaL0 Deep 28 states, however, display trapping and detrapping events 29 which substantially alter ~he transpor~ properties or a semiconductor material. These deep sta~es cause the afore-31 described pac~et o uniformly injected charge carriers to 32 spread out or disperse during their transit across the 33 semiconductor material~ This phenomena arises from charge 34 carriers remaining in deep states ~ile other charge carriers transit the entire distance of the semiconductor 36 device. Thus~ the injected charge carriers end u? being 37 dlspersed throughout the semicondl-ctor material before 1 reaching the opposite electrode.
2 Graphically ~llustrating the aforedescribed p-ro-3 perties, Figure 3 is a conventional representation of re-4 sults or a ~ime o flight experiment, a ~nown tecknique for evalua~ing semiconductor transport properties.
6 Trace 52 shows the collection of charges with 7 respect to time in a semiconductor mzteriaL naving disper-8 sive transpor~ properties~ Dispersive transport properties 9 produce polarlzation effects7 long time constants and si~-lo ilarly undesirable electronic effects in semiconductor 11 devices~
12 To more clearly illustrate, assume that a slab 13 Of amorphous semîconduc~or ma~erial has electrodes depos~
a i~ed on ~he two opposing faces. A uniform field is Lm-pressed across the material between the two elec~rodes and 16 a packet of charge carriers is injected inro the surface 17 of the semiconductor near one electrode. As ~he carriers 18 drif~ across ~he film, a current is induced in the exter-19 nal or moni~oring circuit. As the carriers are collected 2 0 at the opposing electrode~ the current in the e~ternal 2] circuit falls off. For a semiconductor material having 22 dispersive transport-properties, this fall off of current 23 will be protracted as illustrated in Figure 3 as trace 52.
24 In contrast, a semiconductor material having non-dispersive 25 transport propertie~ displays an abrupt drop in the cur-26 rent as the carriers are collected at the opposing elec-27 trodeg illustrated in Figure 3 as trace 50.
28 From the length of time it takes the carriers to 29 reach the back eLectrode~ more commonly referred to in the art as the transit t~me, one can calculate the c~rrier 31 mobility utilizing the relationship:
32 d2 33 ~ V t 34 where ~ is the drift mobili~y, hereinafter mobility;
d is the semiconductor thickness;
36 V is the voltage impressed across the electrodes; and 37 t is the transit time~
3J~
l For disordered materials such as amorphous sili~
2 con, which nonmaLly e~hibit a significant amount of disper~
3 sion in the carrier transpor~, those of ~he art iden~ify 4 the time of arrival of the Leading edge o the charge packet at the oppQSing electrode as the t~ansit time. This 6 time is indicatad in Figure 3 as te . Although this trans-7 ît time effectively over estimates the carrier mobilit~, 8 operationally it îs normally the only time that can be 9 identified irl dispersive materials which show no well de-fined fall-off in current. In some cases even the first 11 arrival tlme of carriers in dispersive materials may not 12 be detectable on a linear scale as is illustrated by trace 13 52 of Figure 3O In this si~uation, ~hose of the art iden-14 tify the first arrlva] time from a plot of the log of the current as a function o the log of the time. In contrast, 16 materials which exhibit non-dispersive transport do not 17 experience this difficulty. Instead of basing the mobility 18 on the arrival of the leading edge of the charge packet, l9 one identifies the transit time as the arrival time o~ the center of the charge pac~cet, ~hich more accurately reflects 21 the true carrier mobility. This transît time is indicated 22 by te in Figure 3. It is well represented by the t~me at 23 which ~he transient current drops to about one half its 24 value in the current pla~eau following the light flash.
This definition of the transit time recognized in the art 26 of non-dispersive se~iconductors, will be adopted here.
27 A more thorough discussion of one exampLe of non-dispersive 28 ~harge carrier transpor~ through semiconductor materials, ~9 may be found in Canali et alO9 Physical Review, Bl2, 2265 ~1975)-31 The present invention relates to amorphous sili-32 con whose transport properties have been substantially 33 altered to provide non dispersive transport of charge 34 carriers through the amorphous semiconductor material7 making ~he material suitable for use in diodes~ trans-36 is~ors~ detectors, solar cells and other similar such 37 semiconductor devices. ~he amorphous silicon in thin r~, 1 film ~orm is deposited by the kno~ technique of glor,7 dis 2 charge decomposit.;on oE silane. A judiciou~ selection or 3 deposition parameters is herein sho~n ~o produce a sub~
4 stantially unique electronic semiconductor material having
6 free of loeallzed trapping s~ates in the energy gap result-7 ~ng i~ an Im interfered transit of the charge carriers 8 through the material. If a planar dis~ri'oution of charge 9 carriers is injected into the aforedescribed high mobility semiconductor~ these ch~rge carriers would (under ~he in-11 fluence of an electric field) drift uniformly through the 12 semiconductor in a coherent Gaussian packet5 which packet 13 would be broadened only by diffusive spreading of the in-14 jected charge packet. Fur~hermore, ~he time required for the center of said charge pac~et to travel a specified 16 distance is inversely proportional to the field in the 17 ma~erial~ provided the field is uniform. This coherent 18 transport of charge carriers, undominated by localized l9 states within the semiconductor~ is conven~ionally referred 20 to as non dispersive transport. As those of the art read 21 ily recogniæe9 semiconductor materials in ~heir natural 22 state do no~ typically display such favorable electronic 23 characteristics~ In the case of single crystals 7 silicon 24 and germanium required extensive research before th~ pro-cessing techniques produced such an electronically favor-26 able semiconductor material. Those of the art will fllrther 27 recogni~e that the property lnfluencing techniques ror 28 altering semiconductor materials are unique to each in-29 dividual material.
A relatively new and pioneering field of the 31 semiconductor industry is amorphous semiconductor mater-32 ials. Unlike their ordered single-crystal counterparts, 33 amorphous semiconductor materials display no long range 34 order. This intrinsic lac~ of order had conventionally 35 been considered severely de~rimental to the electronic 36 transport properties and in particular to mobility of 37 charge carriers. Those of the art had initially considered 1 thls a fundamental obstacle in using such materials in 2 semiconductor applicationsO Amorphous semiconductor m2t-3 erials normally display a substantial density,of localized 4 states in the energy gap. These states are conven~ionall~
divided into two categories depending on their location in 6 the energy gap and their resultant effect on the transport 7 properties of ~he semiconductor materials. ~ ~irst ca~e-8 gory may be defined as shallow sta~es (less than about 0.29 ev from the band edge) which exhi~its relatively short lo trapping time (less than or equal to about 10-9 seconds).
11 These shallow states are gPnerally attributed to fluctua-12 tions in the local potentials. A second category may be 13 generally referred to as deep states. These states are 14 typically greater than about 002 ev from the band edge and trap charge carriers for a relatively long period of time 16 (greater than 10-9 sec.). The term trapping, as known to 17 those in the art~ refers to the influence of the localized 18 s~ates upon a charge carrierO Deep states are generalLy 19 attribute~ to impurities or gross defects in the amorphous semiconduc~or lattice such as unsatisfied or dangling bonds.
21 Since trapping and detrapping events in shallow 22 states are short relative to a cha,ge carrier transit time 23 over dis~ances likely to ~e involved in a semiconductor 24 device (grea~er than 1 micron and less than 100 microns~, their general effect is to produce only a net lowering of 26 the mobility and will not alter othen~ise non-dispersive 27 ~ransport properties of a semiconduc~or materiaL0 Deep 28 states, however, display trapping and detrapping events 29 which substantially alter ~he transpor~ properties or a semiconductor material. These deep sta~es cause the afore-31 described pac~et o uniformly injected charge carriers to 32 spread out or disperse during their transit across the 33 semiconductor material~ This phenomena arises from charge 34 carriers remaining in deep states ~ile other charge carriers transit the entire distance of the semiconductor 36 device. Thus~ the injected charge carriers end u? being 37 dlspersed throughout the semicondl-ctor material before 1 reaching the opposite electrode.
2 Graphically ~llustrating the aforedescribed p-ro-3 perties, Figure 3 is a conventional representation of re-4 sults or a ~ime o flight experiment, a ~nown tecknique for evalua~ing semiconductor transport properties.
6 Trace 52 shows the collection of charges with 7 respect to time in a semiconductor mzteriaL naving disper-8 sive transpor~ properties~ Dispersive transport properties 9 produce polarlzation effects7 long time constants and si~-lo ilarly undesirable electronic effects in semiconductor 11 devices~
12 To more clearly illustrate, assume that a slab 13 Of amorphous semîconduc~or ma~erial has electrodes depos~
a i~ed on ~he two opposing faces. A uniform field is Lm-pressed across the material between the two elec~rodes and 16 a packet of charge carriers is injected inro the surface 17 of the semiconductor near one electrode. As ~he carriers 18 drif~ across ~he film, a current is induced in the exter-19 nal or moni~oring circuit. As the carriers are collected 2 0 at the opposing electrode~ the current in the e~ternal 2] circuit falls off. For a semiconductor material having 22 dispersive transport-properties, this fall off of current 23 will be protracted as illustrated in Figure 3 as trace 52.
24 In contrast, a semiconductor material having non-dispersive 25 transport propertie~ displays an abrupt drop in the cur-26 rent as the carriers are collected at the opposing elec-27 trodeg illustrated in Figure 3 as trace 50.
28 From the length of time it takes the carriers to 29 reach the back eLectrode~ more commonly referred to in the art as the transit t~me, one can calculate the c~rrier 31 mobility utilizing the relationship:
32 d2 33 ~ V t 34 where ~ is the drift mobili~y, hereinafter mobility;
d is the semiconductor thickness;
36 V is the voltage impressed across the electrodes; and 37 t is the transit time~
3J~
l For disordered materials such as amorphous sili~
2 con, which nonmaLly e~hibit a significant amount of disper~
3 sion in the carrier transpor~, those of ~he art iden~ify 4 the time of arrival of the Leading edge o the charge packet at the oppQSing electrode as the t~ansit time. This 6 time is indicatad in Figure 3 as te . Although this trans-7 ît time effectively over estimates the carrier mobilit~, 8 operationally it îs normally the only time that can be 9 identified irl dispersive materials which show no well de-fined fall-off in current. In some cases even the first 11 arrival tlme of carriers in dispersive materials may not 12 be detectable on a linear scale as is illustrated by trace 13 52 of Figure 3O In this si~uation, ~hose of the art iden-14 tify the first arrlva] time from a plot of the log of the current as a function o the log of the time. In contrast, 16 materials which exhibit non-dispersive transport do not 17 experience this difficulty. Instead of basing the mobility 18 on the arrival of the leading edge of the charge packet, l9 one identifies the transit time as the arrival time o~ the center of the charge pac~cet, ~hich more accurately reflects 21 the true carrier mobility. This transît time is indicated 22 by te in Figure 3. It is well represented by the t~me at 23 which ~he transient current drops to about one half its 24 value in the current pla~eau following the light flash.
This definition of the transit time recognized in the art 26 of non-dispersive se~iconductors, will be adopted here.
27 A more thorough discussion of one exampLe of non-dispersive 28 ~harge carrier transpor~ through semiconductor materials, ~9 may be found in Canali et alO9 Physical Review, Bl2, 2265 ~1975)-31 The present invention relates to amorphous sili-32 con whose transport properties have been substantially 33 altered to provide non dispersive transport of charge 34 carriers through the amorphous semiconductor material7 making ~he material suitable for use in diodes~ trans-36 is~ors~ detectors, solar cells and other similar such 37 semiconductor devices. ~he amorphous silicon in thin r~, 1 film ~orm is deposited by the kno~ technique of glor,7 dis 2 charge decomposit.;on oE silane. A judiciou~ selection or 3 deposition parameters is herein sho~n ~o produce a sub~
4 stantially unique electronic semiconductor material having
5 the aforedescribed nondispersive transport properties and
6 relat~vely high majority carrier mobility.
7 Prior to the present invention7 aLl amorphous
8 materials wîth the exception o amorphous selenium and
9 possibly silicon dioxide exhibit dispersive ~ransport a~
10 room temperature. See, for example, Pfister & Scher7
11 Physical Review, B15, 2062 (1977~; Pai, 3Ournal of Chemical
12 Physics~ 52, 2285 ~1970). Tetrahedrally coordinated amor-3 phous networ~ materials such as amorphous silicon, ~or 14 example~ are well known to display dispersive transport of 15 charge carriers; see~ for example, Allan et al., Rroceedin~s 16 of Edinbur~h Conference, 1977, Scher & Montroll, Physical 17 Review~ B12s 2455 (1975). In contrast~ the present inven-18 tion teaches deposition techniques which produce an unex-l9 pec~ed altera~ion of the conventionally observed transport 20 propert~es in amorphous silicon.
22 ~he origin of glow discharge decomposition of 23 silane to produce amorphous silicon is generally attributed 24 ~o Ro C. Chittick et al., reporting their iindings in the 25 Journal o~ Electrochemical Society Vol. 116, No. 1, Jan.
26 (1969~. Substantially similar techniques were utilized by 27 Carlson et alO as disclosed in U.S. Patents 4,064j521, 28 4,069,492 and 4,142,195, and further disclosed in the pub-29 lication "IEEE Transactions on Electronic Devices" Vol. 24, 30 No~ 4, April) 1977. Numerous others in the art have sim-31 ilarly utilized the technique of glow discharge decomposi-32 tlon of silane to deposit amorphous silicon, describing 33 broad ranges of variant deposition condi~ions. It is also 3~ recognized that amorphous silicon prepared by glow dis-35 charge decomposition o silane contains 10-20 w~. % H
36 which gives the ma~erial superior electronic properties 37 over unhydrogenated amorphous silicon. Although broad 1 ranges of deposition conditions have been dlselosed by 2 ~hose i.n the art 9 the particular combination of su~sets 3 of these ranges taught ~y the present invention in con-4 junction with several deposition parameters hereto~ore not taught in the art have resulted in the substantiall~
6 differing amorphous silicon material of the present inven-7 tion~ previously unrealized by those in ~he art.
8 Mos~ ~mportan~ly, the prior ar~ has ~aught that 9 ~he amorphous silicon produced by the deposition parameters disclosed therein dispLays dispersive transport properties 11 and mobilities subs~an~ially Lower than tha~ of the present 12 inven~ion. For example~ W. Fuhs et al. have reported in
22 ~he origin of glow discharge decomposition of 23 silane to produce amorphous silicon is generally attributed 24 ~o Ro C. Chittick et al., reporting their iindings in the 25 Journal o~ Electrochemical Society Vol. 116, No. 1, Jan.
26 (1969~. Substantially similar techniques were utilized by 27 Carlson et alO as disclosed in U.S. Patents 4,064j521, 28 4,069,492 and 4,142,195, and further disclosed in the pub-29 lication "IEEE Transactions on Electronic Devices" Vol. 24, 30 No~ 4, April) 1977. Numerous others in the art have sim-31 ilarly utilized the technique of glow discharge decomposi-32 tlon of silane to deposit amorphous silicon, describing 33 broad ranges of variant deposition condi~ions. It is also 3~ recognized that amorphous silicon prepared by glow dis-35 charge decomposition o silane contains 10-20 w~. % H
36 which gives the ma~erial superior electronic properties 37 over unhydrogenated amorphous silicon. Although broad 1 ranges of deposition conditions have been dlselosed by 2 ~hose i.n the art 9 the particular combination of su~sets 3 of these ranges taught ~y the present invention in con-4 junction with several deposition parameters hereto~ore not taught in the art have resulted in the substantiall~
6 differing amorphous silicon material of the present inven-7 tion~ previously unrealized by those in ~he art.
8 Mos~ ~mportan~ly, the prior ar~ has ~aught that 9 ~he amorphous silicon produced by the deposition parameters disclosed therein dispLays dispersive transport properties 11 and mobilities subs~an~ially Lower than tha~ of the present 12 inven~ion. For example~ W. Fuhs et al. have reported in
13 Physica Status Solidi/ B9 89, h95 (1978) their analysls of
14 the transpor~ properties of amorphous silicon produced by the aoredescrib~d me~hods. These indings verified by 16 others in the art~ such as:
17 1. A. Moore, Applied Physics Letters9 31, 762 (1977) 18 2. W. Fuhs9 Mo Milleville and J. Stu~e, Physica Status 19 Solidi, 84, 495 (1978) 3. W. Spear and P. LeComber, Journal o~ Non-Crystalline 21 Solids, 8 lQ, 727 (1972~
22 which typify ~he numerous disclosures of the electronic 23 transport properties of glow discharga produced amorphous 24 silicon. All ~nown prior art teachings support the pre-2s viously accep~ed principle that the transpor~ properties 26 of amorphous silicon are dispersive and have relatively 27 low values for majorîty carrier mobilityO In contrast, 28 the present invention provides deposition parameters re-29 sulting in an electronica~ly differing amorphous silicon semiconductor having relatively high majorlty carrier 31 mobili.ties and displaying non dispersive transport pro-32 perties.
34 In the glow discharge deposition of amorphous silicon, a combination of deposition parameters results in 36 a substantially unique electron transport mechanism hereto-37 fore unrealized in the art of amorphous silicon semiconduc-38 tors. Devices constructed utilizing the amorphous silicon o:f the present ;nve lt:ion display nondîspersive electron 2 transport properti es having mobilities in excess o about 3 0.6 cm2/v-sec. When embodied in a semiconduct~r sr,Jitching 4 deviccg the ~npr~ved semiconductor material will subst~n-5 tially decrease the switchin~ time of the device.
6 BRIEF DESCRIPTION OF THE DRAWI~GS
7 In the drawi.ngs 9 where identical componen~s are 8 designa~ed by common reference numbers:
9 Figure 1 is a side view of a Schottky diode de-vice having a body of high mobility amorphous silicon;
11 Figure 2 is a cutaway profile of a glow discharge 12 deposition system for producing films of amorphous silicon;
13 Figure 3 is a graphic plot of the charge carrier 14 produced current shown as a function of time 7 displaying the non dispersive transpor~ properties of the present in-16 vention shown in co~trast to the prlor art dispersive 17 ~ransport properties of amorphous sîlicon.
18 DETAILED DESCRIPTION OF '~HE lNV~:NllON
19 Referr~ng now to Figure 1 there is shown the 20 amorphous silicon semiconductor of the present invention 21 e~bodied in a Schottky diode. The device is constructed 22 by selecting a substrate 10 for deposition of a layer of 23 amorphous silicon thereon. Substrate 10 is sufficiently 24 resilient to provide support to the overlying layers. The 25 substrate 10 must further be capable of withstanding temp-26 eratures in excess of about 500C. The term withstand here 27 requires that the substrate so heated experiences virtually 28 no change in the macroscopic dimensions or microscopie 29 surace charac~eristics of the substrate. Additionally~
the surface of the substrate must be free of surface de-31 fects of the order of one m;cron or larger to prevent dis-32 continuity in the overlying layers. Referring to Figure 33 2~ where the substrate is to be heated from below duri.ng 34 the deposition of the overlying layers, the substrate must 35 be capable o conducting or transmit~ing a sufficient 36 amount of heat from its lowermos~ surface to the deposition 37 surface. Referring to Figure 1, layer 12 comprises a _ 9 .
1 material which will for~n an ohmic ~ontac~ to ~he overl7ing 2 a~orphous siliconO The term ohmic contact generally reers 3 to the ab:ility of an electrode to both extract or inject 4 charge carriers (elther electrons ~r hoLes) as opposed to 5 blocking contact ~hich wil~ preferen~ially inject or extract 6 ~ne type of carrier. This layer may comprise the subs~rate 7 material itsel~ or, alternatively~ a thin layer suitable 8 for forming the aforedescribed onmic contact may be inter-9 posed between said substrate and said amorphous silicon 10 layer. It has been generally found tha~ alrl~;nl-m and anti-11 m~ny form sui~able ohmlc contacts to intrinsic amorphous 12 silicon at or below the anticipated deposition temperatures.
13 If~ however, the initial region of amorphous silicon is 14 doped ~~ as described hereinaf~er~ other materials such as
17 1. A. Moore, Applied Physics Letters9 31, 762 (1977) 18 2. W. Fuhs9 Mo Milleville and J. Stu~e, Physica Status 19 Solidi, 84, 495 (1978) 3. W. Spear and P. LeComber, Journal o~ Non-Crystalline 21 Solids, 8 lQ, 727 (1972~
22 which typify ~he numerous disclosures of the electronic 23 transport properties of glow discharga produced amorphous 24 silicon. All ~nown prior art teachings support the pre-2s viously accep~ed principle that the transpor~ properties 26 of amorphous silicon are dispersive and have relatively 27 low values for majorîty carrier mobilityO In contrast, 28 the present invention provides deposition parameters re-29 sulting in an electronica~ly differing amorphous silicon semiconductor having relatively high majorlty carrier 31 mobili.ties and displaying non dispersive transport pro-32 perties.
34 In the glow discharge deposition of amorphous silicon, a combination of deposition parameters results in 36 a substantially unique electron transport mechanism hereto-37 fore unrealized in the art of amorphous silicon semiconduc-38 tors. Devices constructed utilizing the amorphous silicon o:f the present ;nve lt:ion display nondîspersive electron 2 transport properti es having mobilities in excess o about 3 0.6 cm2/v-sec. When embodied in a semiconduct~r sr,Jitching 4 deviccg the ~npr~ved semiconductor material will subst~n-5 tially decrease the switchin~ time of the device.
6 BRIEF DESCRIPTION OF THE DRAWI~GS
7 In the drawi.ngs 9 where identical componen~s are 8 designa~ed by common reference numbers:
9 Figure 1 is a side view of a Schottky diode de-vice having a body of high mobility amorphous silicon;
11 Figure 2 is a cutaway profile of a glow discharge 12 deposition system for producing films of amorphous silicon;
13 Figure 3 is a graphic plot of the charge carrier 14 produced current shown as a function of time 7 displaying the non dispersive transpor~ properties of the present in-16 vention shown in co~trast to the prlor art dispersive 17 ~ransport properties of amorphous sîlicon.
18 DETAILED DESCRIPTION OF '~HE lNV~:NllON
19 Referr~ng now to Figure 1 there is shown the 20 amorphous silicon semiconductor of the present invention 21 e~bodied in a Schottky diode. The device is constructed 22 by selecting a substrate 10 for deposition of a layer of 23 amorphous silicon thereon. Substrate 10 is sufficiently 24 resilient to provide support to the overlying layers. The 25 substrate 10 must further be capable of withstanding temp-26 eratures in excess of about 500C. The term withstand here 27 requires that the substrate so heated experiences virtually 28 no change in the macroscopic dimensions or microscopie 29 surace charac~eristics of the substrate. Additionally~
the surface of the substrate must be free of surface de-31 fects of the order of one m;cron or larger to prevent dis-32 continuity in the overlying layers. Referring to Figure 33 2~ where the substrate is to be heated from below duri.ng 34 the deposition of the overlying layers, the substrate must 35 be capable o conducting or transmit~ing a sufficient 36 amount of heat from its lowermos~ surface to the deposition 37 surface. Referring to Figure 1, layer 12 comprises a _ 9 .
1 material which will for~n an ohmic ~ontac~ to ~he overl7ing 2 a~orphous siliconO The term ohmic contact generally reers 3 to the ab:ility of an electrode to both extract or inject 4 charge carriers (elther electrons ~r hoLes) as opposed to 5 blocking contact ~hich wil~ preferen~ially inject or extract 6 ~ne type of carrier. This layer may comprise the subs~rate 7 material itsel~ or, alternatively~ a thin layer suitable 8 for forming the aforedescribed onmic contact may be inter-9 posed between said substrate and said amorphous silicon 10 layer. It has been generally found tha~ alrl~;nl-m and anti-11 m~ny form sui~able ohmlc contacts to intrinsic amorphous 12 silicon at or below the anticipated deposition temperatures.
13 If~ however, the initial region of amorphous silicon is 14 doped ~~ as described hereinaf~er~ other materials such as
15 chrome and nichrome fo~m ohmic contacts to said doped ma~-
16 erial. In a preferred embodiment a 19000 Angs~rom thick
17 layer of nichrome is sputter deposi~ed jus~ prior to the
18 deposi~ion of the overlyiIlg N'- doped semiconductor layer.
19 It should be recognized that the vacuum deposition of the
20 several materials described herein may be accomplished in
21 a single deposition apparatus suitably fixtl1red to accom-
22 modate multiple deposition conditions, thus avoiding ex-
23 posure of the par~ially constructed device to atmospheric
24 condit~ons.
Layer 14 comprises the improved amorphous semi-26 conductor material of the present invention. As mentioned 27 heretofore, the semiconductor layer 14 is vacuum deposited 28 by the glo~- discharge decompositlon of silane. As illustra-29 tive thereor, in Figure 2, there is shown a vacuum deposition 30 chamber adapted to provide glow discharge deposition of 31 amorphous silicon. An atmosphere excluding chamber 30 com-32 prises a conventio~al bell jar 32, base plate 3~ and pumping 33 station 36. To m; n;m; ze incorporation of extrinsic elements 34 in the deposition process bell jar 32 may be evacuated to 35 advantage to a pressure of below about lO 5 torr, back 36 filled with CiH4 and subsequently re-evacuated. This pro-37 cess may be repeated. The aforedescribed substrate lG having ~,,6~ q'.~ r,~
ohmic contact 12 is held continc3uous to an electrode 3~ which for difEerirlg depositions techniques to be described hereinafter will either be an anode electrode or a cathode electrode. A heater element, ~0 here illustra-ted as embedded within the electrode 38, is capable of sustaining a subsJ~rate temperature in excess of about 500C. Although not shown, substrate 10 need not be posi-tioned contiguous to electrode 38, but may alternatively be posi-tioned within the vicinity of said electrode provided suitable means of substrate heating is provided. Substrate 10 is heated to a temperature between about 220C and about 350C. Conven-tional thermocouple means (not shown), or alternatively, optical pyrometer means (also not shown) may be used to monitor the temperature of the substrate~ Means for sustaining a relatively invarient substrate temperature may be incorpoxated to advantage.
Gaseous silane, Si~4, is b]ed into the evacuated chamber 30 through metering, mixing and flow control means here collectively illus-trated as ~2. The pressure of chamber 30 is raised to between about 20 millitorr and about 850 millitorr by controlling the gas feed rate and the vacuum pumping speed.
--DC Glow Discharge Deposition--To initiate direct current (hereinafter DC~ glow dis-charge deposition, a DC electropotential of between about 700 volts and about 800 volts is impressed between electrode 38, here a cathode electrode, and electrode 46, here an anode electrode.
In a preferred embodiment, an amount of gaseous phosphene may be initially mixed with the silane, said mixture constituting a phosphene to silane ratio between about .3 to 100 and about 3. to 100. ~y so doing, the initial layers of amorphous silicon here shown at 13 are doped N+, insuring that the underlying electrode forms an ohmic contact. Typically, the deposition of the N+
r~gion will extend from about 50 Angstroms to about 100 Angstroms whereafter the supply of phosphene gas is removed and glow dis-charge decomposition of pure silane produces the intrinsic amor-phous silicon layer of the present invention. In the DC mode of glow discharge decomposition of silane, electrons striking the ~ 3 l ~ , 6 ~ 3 silane mo:lecules both ionize and partially disassociate the mole-cules. Molecular and a-tomic species di.ffuse and drift to the electrode containing -the substrate lO. With a gas flow rate of silane regulated at about lO cm3/rnin. and the chamber pressure regulated at be-tween 800 millitorr and ahout 850 millitorr, a glow discharge potential of between about 700 volts and 800 volts impressed across generical.ly eylindrical electrodes having a mean diameter of about 7.6 cm and an inter-electrode spacing of about 2.5 cm produces a discharge current of between about .05 milli amps per cm2 and 0.3 milli amps per cm2. Under these deposition conditions a layer of amorphous silicon between about l to 5 microns correlates to a deposition rate of between about 4 Ang-stroms per second and 30 Angstroms per second.
---R~Fo Glow Discharge--An alternative glow discharge deposition proeess substi-tutes radio frequency (hereinafter RF) exitation of the discharge Substxate lO is secured to electrode 38, whieh for R~ glow dis-charge is an anode electrodeO The substrate is heated to a temperature of between about 250C and about 350C. As described for the previous deposition technique~ chamber 30 is evacuated below about lO 5 torr, back filled with SiH4 and re-evacuated.
As before, this proeess may be repeated to advantage. Similar to the DC deposition, a preferred embodiment utilizes an amount of gaseous phosphene eonstituents between about 0.3 and 3~ of the gaseous mixture of silane and phosphene to dope the initial layer of amorphous silicon (here shown as 13) N+ ensuring that the underlying electrode forms an ohmic contact. ~n RF power souree, not shown, is conneeted in power supplying re]ationship to elee-trodes 38 and 46. The RF power supply is capable of eoupling about 100 watts of power to a glow discharge under the herein-described gas content and gas pressure conditions. The discharge is ini.tiated by either adjusting the pressure of ehamber 30 or by providing an auxiliary electrie field of suffieient magnitude to initiate ionization whereafter said di.scharge is sustained by RF
exitation. This ionization ~ 12 ~
1 phenomenon, cor~nonly referxed to as the Pennington effect, 2 is well known to those in the art. After the deposition of 3 an initial 50 to about 500 Angstroms of M+ doped silicon 4 the phosphene supply is eliminated. ~ flow rate of pure silane is re~established and th~ pressure of chamber 30 i~
~ maintained at between about 30 millitorr and about 50 milli-7 torr by con1_rolling the vacuum pumping speed, means for 8 which is iLlustrated at 44. The silane flow rate is propor-9 tional to the electrode area and having a value of about 0.05 cm3/min to about 0.06 cm3/min per cm2 of electrode area.
ll Electrode area is defined as the innermost surface area of 12 the anode or cathode electrode. The ~F power input during 13 the deposition is maintained between about 60 watts and 14 about 90 watts as measured by a conventional watt meter capacitively coupled to the partial pressures of gases con-16 tained within the vacuum chamber by means of a pair of gen-17 erally cylindrical electrodes having a mean diameter of 18 about 8 inches and having an inter-electrode spacing of l9 about 2 inches; this power level, however, is determined by measuring the input power less the reflected power, which 21 does not account for radiated power losses. Under the 22 aforedescribed deposition conditions, a layer of amorphous 23 silicon between about l micron and about 3 microns in thick-24 ness is deposited in about 80 mlnutes which correlates to a deposition rate between about 2 ~ngstroms per second and 26 about 6 Angstroms per second.
27 The deposition parameters, as described herein for 28 either DC or RF glow discharge result in an electronically 29 unique semiconductor layer of amorphous silicon nowhere re-vealed in the art. The unique properties of this material 31 are best described in terms of its fundamental electrical 32 characteristics which is a standard of evaluation common to 33 virtually all semiconductor materials and recognized by 34 those in the art. To facilitate this evaluation of the fundamental properties of the amorphous silicon layer, a 36 blocking or diodc juncticn is formed thereto by depositing 1 a high work func-tlon rnetal 16 onto the amorpholls silicon 2 layer. The term high work function i5 definable as being 3 above t:he estimated work function of amorphous silicon that 4 is above about 4.5 EV: metals or similar such materials having 5 work functions above this value form diode junctions; however, 6 palladium having a work function above about 4.8 e.v. has been 7 shown preferable~ In an alternative embodiment a PN junction 8 may be formed by depositing a P-type layer onto the N-type amor-9 phous silicon or similarly doping a region of the previously N-lO type amorphous silicon rendering said region P-type. An intrin-11 sic layer may be interposed between the P&N layers to advantage.
12 A conventional time of flight technique is uti-13 lized in the characterization of charge carrier transport 14 properties, providiny data on the mobility of majority car-15 rier electron transit through the amorphous silicon layer.
16 Utilizing known techniques, electrons (and holes) are inject-17 ed at the blocking contact. A short duration (approx. 8 nano-seconds) pulse of laser generated llght of a wavelength which is substantially absorbed within about the first 500 Angstroms of the amorphous silicon laver, generate electron hole pairs in the semiconductor at or near the diode junc-tion. A pulsed electric field of known magnitude and dura-tion is impressed across the amorphous silicon layer. Under the influence of this known fieldr injected electrons drift or migrate through the amorphous silicon semiconductor layer to ~e collected at the opposing e]ectrode. E:lectrons drift-ing through the semiconductor material induce a current in the external circuit. This current is displayed in Fig. 3 as a function of time. Referring to trace 50 of Fig. 3, at time 31 equal to -to the field pulse is init;ated, Shortly therea,~ter~ here 32 shown at time equal to zero, a packet of charge carriers are injected 33 at or near the surface of amorphous silicon layer. The time t should 34 be short relative to the dielectric relaxation time of the material 35 deflned by td=p~ where ~ is the dielectric constant of the material 36 and p is its resistivity. This ensures that the externally applied 37 field is applied uniformly across the material. The charges 38 traversin~ a known thickness of amorphous silicon 1 produce a current I, shown on the vertical a~is and plotted 2 against elapsed time, shown on the horizontal axis. The 3 fall~off of current hexe shown at te defines the transit 4 time of charge carriers aeross the known distance of amor-phous semiconductor material. The transit time indicated 6 at t in Figure 3 is the time of arrival of the center of 7 the charge paeket at the opposing eleetrode. The mobility 8 of these charge carriers (here the majority eleetron car-9 riers) is defined by the relationship: ~ - d2/V te where ~ is the mobility of eleetrons~ d is the thiekne~s of the amorphous silicon layer, V is the voltage appliea aeross the silicon layer and te is the electron transit time~ As those skilled in the art further recognize trace 5Q repre-~ sents the transport of charge carriers in a relativeiy co-15 herent Gaussian packet indicatinga semiconductor transport 6 mechanismgenerallyknown as, and herein defined to be nondis-~ persive transpor-t of charge carriers~ Trace 50 is similar to the corresponding transient current observed in high mobili-ty nondispersive single crystal materials such as crystal-line silicon. Curve sa is broadened only in response to t~e diffusive spreading of the injected charge packet. Trace 52, in contrast, is the transport properties of charge car-riers in amorphous silicon not produced in accordance with the present invention. Trace 52 ;s representative of the dispersive transport mechanis~ predicted by and, prior to this invention~ reported by those of the art.
28 As is presently understood~ the combination of depo-sition parameters selected in accordance ~ith this invention results in an improved amorphous silicon semiconductor hav-ing nondispersive transport of majority carriers through the 32 semiconductor material. This preferred -transport mechanism 33 resultsin a substantially greatermobility of majority carriers:
34 throughsemiconductor enabling the semiconductorto beused in 3 improved switching speedelectronie devices. Themobilitymeas-36 uredfor amorphous silicon produced in accordancewith thepres-37 ent invention isin excessof 0.6 cm2/v~sec for filmsprepared by 38 D.C. glowdischarge means and in excessof 0.9 cm2/v-secforfilms 39 prepared by RF glow discharge means. Thisvalue ofthe mobility -- l5 --is determined Erom the transit tirne of the center of a charge 2 packet in accordance with the generally accepted practice for 3 nondispersive conductors.
~I E~ample A plurality of Corning-type 7059 borosilicate glass 6 substxates were scrupulously cleaned to remove microscopic de-7 hris from the major surfaces of substrate. The cleaned sub-8 strates were placed in a conventional sputtering apparatus 9 wherein a layer oE about 1000 Angstroms of nichrome metal was 10 deposited over a ma~or portion of one side of the substrates.
11 The substrates were transferred to a glow discharge deposition 12 apparatus, similar to that illustrated in Fig. 2 of the draw-13 ings. The deposition apparatus included a Pyrex~ell jar about 14 30 cm high and about 15 cm in diameter held in vacuum contact to a 15 s~ainless steel baseplate by interposing a vycor gasXet therebe-16 tween. A pumping station comprising selectablY alternat:ive pump-17 ing means of mechanical pumping, diffusion pumping, or turbomo-18 lecular pumping, is uti]ized to evacuate the deposition chamber.
19 Pumping speed is controlled by selectively varying the opening 20 and closing of an aperture between the pumping station and the dep-21 osition chamber. An anode electrode comprising a 7.6 cm diameter 22 circular disc of stainless steel, approximately .6 cm in thick-23 ness, has a plurality of resistive heating elemènts embedded 24 withln the electrode. The heaters are connected to a convention-
Layer 14 comprises the improved amorphous semi-26 conductor material of the present invention. As mentioned 27 heretofore, the semiconductor layer 14 is vacuum deposited 28 by the glo~- discharge decompositlon of silane. As illustra-29 tive thereor, in Figure 2, there is shown a vacuum deposition 30 chamber adapted to provide glow discharge deposition of 31 amorphous silicon. An atmosphere excluding chamber 30 com-32 prises a conventio~al bell jar 32, base plate 3~ and pumping 33 station 36. To m; n;m; ze incorporation of extrinsic elements 34 in the deposition process bell jar 32 may be evacuated to 35 advantage to a pressure of below about lO 5 torr, back 36 filled with CiH4 and subsequently re-evacuated. This pro-37 cess may be repeated. The aforedescribed substrate lG having ~,,6~ q'.~ r,~
ohmic contact 12 is held continc3uous to an electrode 3~ which for difEerirlg depositions techniques to be described hereinafter will either be an anode electrode or a cathode electrode. A heater element, ~0 here illustra-ted as embedded within the electrode 38, is capable of sustaining a subsJ~rate temperature in excess of about 500C. Although not shown, substrate 10 need not be posi-tioned contiguous to electrode 38, but may alternatively be posi-tioned within the vicinity of said electrode provided suitable means of substrate heating is provided. Substrate 10 is heated to a temperature between about 220C and about 350C. Conven-tional thermocouple means (not shown), or alternatively, optical pyrometer means (also not shown) may be used to monitor the temperature of the substrate~ Means for sustaining a relatively invarient substrate temperature may be incorpoxated to advantage.
Gaseous silane, Si~4, is b]ed into the evacuated chamber 30 through metering, mixing and flow control means here collectively illus-trated as ~2. The pressure of chamber 30 is raised to between about 20 millitorr and about 850 millitorr by controlling the gas feed rate and the vacuum pumping speed.
--DC Glow Discharge Deposition--To initiate direct current (hereinafter DC~ glow dis-charge deposition, a DC electropotential of between about 700 volts and about 800 volts is impressed between electrode 38, here a cathode electrode, and electrode 46, here an anode electrode.
In a preferred embodiment, an amount of gaseous phosphene may be initially mixed with the silane, said mixture constituting a phosphene to silane ratio between about .3 to 100 and about 3. to 100. ~y so doing, the initial layers of amorphous silicon here shown at 13 are doped N+, insuring that the underlying electrode forms an ohmic contact. Typically, the deposition of the N+
r~gion will extend from about 50 Angstroms to about 100 Angstroms whereafter the supply of phosphene gas is removed and glow dis-charge decomposition of pure silane produces the intrinsic amor-phous silicon layer of the present invention. In the DC mode of glow discharge decomposition of silane, electrons striking the ~ 3 l ~ , 6 ~ 3 silane mo:lecules both ionize and partially disassociate the mole-cules. Molecular and a-tomic species di.ffuse and drift to the electrode containing -the substrate lO. With a gas flow rate of silane regulated at about lO cm3/rnin. and the chamber pressure regulated at be-tween 800 millitorr and ahout 850 millitorr, a glow discharge potential of between about 700 volts and 800 volts impressed across generical.ly eylindrical electrodes having a mean diameter of about 7.6 cm and an inter-electrode spacing of about 2.5 cm produces a discharge current of between about .05 milli amps per cm2 and 0.3 milli amps per cm2. Under these deposition conditions a layer of amorphous silicon between about l to 5 microns correlates to a deposition rate of between about 4 Ang-stroms per second and 30 Angstroms per second.
---R~Fo Glow Discharge--An alternative glow discharge deposition proeess substi-tutes radio frequency (hereinafter RF) exitation of the discharge Substxate lO is secured to electrode 38, whieh for R~ glow dis-charge is an anode electrodeO The substrate is heated to a temperature of between about 250C and about 350C. As described for the previous deposition technique~ chamber 30 is evacuated below about lO 5 torr, back filled with SiH4 and re-evacuated.
As before, this proeess may be repeated to advantage. Similar to the DC deposition, a preferred embodiment utilizes an amount of gaseous phosphene eonstituents between about 0.3 and 3~ of the gaseous mixture of silane and phosphene to dope the initial layer of amorphous silicon (here shown as 13) N+ ensuring that the underlying electrode forms an ohmic contact. ~n RF power souree, not shown, is conneeted in power supplying re]ationship to elee-trodes 38 and 46. The RF power supply is capable of eoupling about 100 watts of power to a glow discharge under the herein-described gas content and gas pressure conditions. The discharge is ini.tiated by either adjusting the pressure of ehamber 30 or by providing an auxiliary electrie field of suffieient magnitude to initiate ionization whereafter said di.scharge is sustained by RF
exitation. This ionization ~ 12 ~
1 phenomenon, cor~nonly referxed to as the Pennington effect, 2 is well known to those in the art. After the deposition of 3 an initial 50 to about 500 Angstroms of M+ doped silicon 4 the phosphene supply is eliminated. ~ flow rate of pure silane is re~established and th~ pressure of chamber 30 i~
~ maintained at between about 30 millitorr and about 50 milli-7 torr by con1_rolling the vacuum pumping speed, means for 8 which is iLlustrated at 44. The silane flow rate is propor-9 tional to the electrode area and having a value of about 0.05 cm3/min to about 0.06 cm3/min per cm2 of electrode area.
ll Electrode area is defined as the innermost surface area of 12 the anode or cathode electrode. The ~F power input during 13 the deposition is maintained between about 60 watts and 14 about 90 watts as measured by a conventional watt meter capacitively coupled to the partial pressures of gases con-16 tained within the vacuum chamber by means of a pair of gen-17 erally cylindrical electrodes having a mean diameter of 18 about 8 inches and having an inter-electrode spacing of l9 about 2 inches; this power level, however, is determined by measuring the input power less the reflected power, which 21 does not account for radiated power losses. Under the 22 aforedescribed deposition conditions, a layer of amorphous 23 silicon between about l micron and about 3 microns in thick-24 ness is deposited in about 80 mlnutes which correlates to a deposition rate between about 2 ~ngstroms per second and 26 about 6 Angstroms per second.
27 The deposition parameters, as described herein for 28 either DC or RF glow discharge result in an electronically 29 unique semiconductor layer of amorphous silicon nowhere re-vealed in the art. The unique properties of this material 31 are best described in terms of its fundamental electrical 32 characteristics which is a standard of evaluation common to 33 virtually all semiconductor materials and recognized by 34 those in the art. To facilitate this evaluation of the fundamental properties of the amorphous silicon layer, a 36 blocking or diodc juncticn is formed thereto by depositing 1 a high work func-tlon rnetal 16 onto the amorpholls silicon 2 layer. The term high work function i5 definable as being 3 above t:he estimated work function of amorphous silicon that 4 is above about 4.5 EV: metals or similar such materials having 5 work functions above this value form diode junctions; however, 6 palladium having a work function above about 4.8 e.v. has been 7 shown preferable~ In an alternative embodiment a PN junction 8 may be formed by depositing a P-type layer onto the N-type amor-9 phous silicon or similarly doping a region of the previously N-lO type amorphous silicon rendering said region P-type. An intrin-11 sic layer may be interposed between the P&N layers to advantage.
12 A conventional time of flight technique is uti-13 lized in the characterization of charge carrier transport 14 properties, providiny data on the mobility of majority car-15 rier electron transit through the amorphous silicon layer.
16 Utilizing known techniques, electrons (and holes) are inject-17 ed at the blocking contact. A short duration (approx. 8 nano-seconds) pulse of laser generated llght of a wavelength which is substantially absorbed within about the first 500 Angstroms of the amorphous silicon laver, generate electron hole pairs in the semiconductor at or near the diode junc-tion. A pulsed electric field of known magnitude and dura-tion is impressed across the amorphous silicon layer. Under the influence of this known fieldr injected electrons drift or migrate through the amorphous silicon semiconductor layer to ~e collected at the opposing e]ectrode. E:lectrons drift-ing through the semiconductor material induce a current in the external circuit. This current is displayed in Fig. 3 as a function of time. Referring to trace 50 of Fig. 3, at time 31 equal to -to the field pulse is init;ated, Shortly therea,~ter~ here 32 shown at time equal to zero, a packet of charge carriers are injected 33 at or near the surface of amorphous silicon layer. The time t should 34 be short relative to the dielectric relaxation time of the material 35 deflned by td=p~ where ~ is the dielectric constant of the material 36 and p is its resistivity. This ensures that the externally applied 37 field is applied uniformly across the material. The charges 38 traversin~ a known thickness of amorphous silicon 1 produce a current I, shown on the vertical a~is and plotted 2 against elapsed time, shown on the horizontal axis. The 3 fall~off of current hexe shown at te defines the transit 4 time of charge carriers aeross the known distance of amor-phous semiconductor material. The transit time indicated 6 at t in Figure 3 is the time of arrival of the center of 7 the charge paeket at the opposing eleetrode. The mobility 8 of these charge carriers (here the majority eleetron car-9 riers) is defined by the relationship: ~ - d2/V te where ~ is the mobility of eleetrons~ d is the thiekne~s of the amorphous silicon layer, V is the voltage appliea aeross the silicon layer and te is the electron transit time~ As those skilled in the art further recognize trace 5Q repre-~ sents the transport of charge carriers in a relativeiy co-15 herent Gaussian packet indicatinga semiconductor transport 6 mechanismgenerallyknown as, and herein defined to be nondis-~ persive transpor-t of charge carriers~ Trace 50 is similar to the corresponding transient current observed in high mobili-ty nondispersive single crystal materials such as crystal-line silicon. Curve sa is broadened only in response to t~e diffusive spreading of the injected charge packet. Trace 52, in contrast, is the transport properties of charge car-riers in amorphous silicon not produced in accordance with the present invention. Trace 52 ;s representative of the dispersive transport mechanis~ predicted by and, prior to this invention~ reported by those of the art.
28 As is presently understood~ the combination of depo-sition parameters selected in accordance ~ith this invention results in an improved amorphous silicon semiconductor hav-ing nondispersive transport of majority carriers through the 32 semiconductor material. This preferred -transport mechanism 33 resultsin a substantially greatermobility of majority carriers:
34 throughsemiconductor enabling the semiconductorto beused in 3 improved switching speedelectronie devices. Themobilitymeas-36 uredfor amorphous silicon produced in accordancewith thepres-37 ent invention isin excessof 0.6 cm2/v~sec for filmsprepared by 38 D.C. glowdischarge means and in excessof 0.9 cm2/v-secforfilms 39 prepared by RF glow discharge means. Thisvalue ofthe mobility -- l5 --is determined Erom the transit tirne of the center of a charge 2 packet in accordance with the generally accepted practice for 3 nondispersive conductors.
~I E~ample A plurality of Corning-type 7059 borosilicate glass 6 substxates were scrupulously cleaned to remove microscopic de-7 hris from the major surfaces of substrate. The cleaned sub-8 strates were placed in a conventional sputtering apparatus 9 wherein a layer oE about 1000 Angstroms of nichrome metal was 10 deposited over a ma~or portion of one side of the substrates.
11 The substrates were transferred to a glow discharge deposition 12 apparatus, similar to that illustrated in Fig. 2 of the draw-13 ings. The deposition apparatus included a Pyrex~ell jar about 14 30 cm high and about 15 cm in diameter held in vacuum contact to a 15 s~ainless steel baseplate by interposing a vycor gasXet therebe-16 tween. A pumping station comprising selectablY alternat:ive pump-17 ing means of mechanical pumping, diffusion pumping, or turbomo-18 lecular pumping, is uti]ized to evacuate the deposition chamber.
19 Pumping speed is controlled by selectively varying the opening 20 and closing of an aperture between the pumping station and the dep-21 osition chamber. An anode electrode comprising a 7.6 cm diameter 22 circular disc of stainless steel, approximately .6 cm in thick-23 ness, has a plurality of resistive heating elemènts embedded 24 withln the electrode. The heaters are connected to a convention-
25 al temperature controller, capable of maintaining a relatively
26 constant (+2C) temperature of the electrode. The substrates
27 may be secured to the heater/cathode electrode by simple mechan-
28 ical means so long as electrical contact is assured between the
29 ca~hode electrode and the electrodes on the substrate. A second
30 e ~ ctrode, the anodic electrode, of similar size and composition l is positioned parallel to the cathode electrode and having an nter-electrode spacing of about 2.5 cm. After evacuating the deposition chamber, CCD grade silane is bled into the chamber.
34 In a preferred embodiment, silane is bled into the chamber while 35 concurrently pumping to evacuate same, purging the chamber of re-36 sidual atmospheric gases. Gaseous silane, SiH4 containing about 1% phosphene, PH3, is bled into the evacuated deposition chamber.
A gas mixing and control system, constructed by Navtek Corp., ~c~cl~ r 1~
1 providesprecise mixiny and con-trol ofyas flow rates, The 2 initial gas flow mi~ture of~l.lane andphosphenewas regulated 3 a.t 10 standard cm3/min, The pumping speedwas regulated to pro-vide a deposition chamber pres.sureofabout 850 milli.torr~ A con-5 stant current DCpower supply i.s connected in power su~pl,ving relation 6 to the anode and cathode ele~trode respecti~ely, A potenti.al of 7 about 750 volts ls applied be,tween the anode and cathode 8 electrode, maintaini~g a cathode voltage of about 85Q yolts g with respect to ground and maintaining an anode voltage of 10 about 100 vol~s with re.spect to ground. The electric field 11 impressed between the electrodes both decomposes and ionizes 12 the gas content o~ the chamber in a conventional glow dis-13 charge manner. ~fter a deposition period of about 45 seconds 14 which deposits a phosphene doped N+ layer OL amorphous silicon 15 about 700 ~ in thickness, the sup~ly of phosphene was removed 16 and the system was effectively ?urged to remove any residu21 17 p~3. Pure sil2ne is then fed into the system at 2 controlled 18 flow r2te of zbout 10 standard cm3/min. The deposition of 19 intrinsic amorphous silicon continues for a period of about 20 15 minutes to deposit an intrinsic layer about 1.5 microns in 21 thickness. A counter electrode comprising about 100 A Or 22 palladium is deposited on top of the amor?hous silico~ to 23 form a Schottky junction thereto. ~or experimental pur?oses, 24 ~.e p211adium electrode i5 kept sufIlciently thin to permit 25 light transparency therethrough.
26 The absorption and re~lective characteristics of 27 both the 2morphous silicon and the overlying palladi-lm layer 28 were e~amined using a Cary Model 17 s?ectrophotometer. The 29 optical characteristics OL the palladium film indicated an 30 average white light transmittance of about 30%. The optical
34 In a preferred embodiment, silane is bled into the chamber while 35 concurrently pumping to evacuate same, purging the chamber of re-36 sidual atmospheric gases. Gaseous silane, SiH4 containing about 1% phosphene, PH3, is bled into the evacuated deposition chamber.
A gas mixing and control system, constructed by Navtek Corp., ~c~cl~ r 1~
1 providesprecise mixiny and con-trol ofyas flow rates, The 2 initial gas flow mi~ture of~l.lane andphosphenewas regulated 3 a.t 10 standard cm3/min, The pumping speedwas regulated to pro-vide a deposition chamber pres.sureofabout 850 milli.torr~ A con-5 stant current DCpower supply i.s connected in power su~pl,ving relation 6 to the anode and cathode ele~trode respecti~ely, A potenti.al of 7 about 750 volts ls applied be,tween the anode and cathode 8 electrode, maintaini~g a cathode voltage of about 85Q yolts g with respect to ground and maintaining an anode voltage of 10 about 100 vol~s with re.spect to ground. The electric field 11 impressed between the electrodes both decomposes and ionizes 12 the gas content o~ the chamber in a conventional glow dis-13 charge manner. ~fter a deposition period of about 45 seconds 14 which deposits a phosphene doped N+ layer OL amorphous silicon 15 about 700 ~ in thickness, the sup~ly of phosphene was removed 16 and the system was effectively ?urged to remove any residu21 17 p~3. Pure sil2ne is then fed into the system at 2 controlled 18 flow r2te of zbout 10 standard cm3/min. The deposition of 19 intrinsic amorphous silicon continues for a period of about 20 15 minutes to deposit an intrinsic layer about 1.5 microns in 21 thickness. A counter electrode comprising about 100 A Or 22 palladium is deposited on top of the amor?hous silico~ to 23 form a Schottky junction thereto. ~or experimental pur?oses, 24 ~.e p211adium electrode i5 kept sufIlciently thin to permit 25 light transparency therethrough.
26 The absorption and re~lective characteristics of 27 both the 2morphous silicon and the overlying palladi-lm layer 28 were e~amined using a Cary Model 17 s?ectrophotometer. The 29 optical characteristics OL the palladium film indicated an 30 average white light transmittance of about 30%. The optical
31 characteristics or the 2morphous silicon film indicated a
32 band gap of about 1.8 ev.
33 A conventional time o~ 'light meas~rement was con-
34 ducted on the diode device. A ~ulsed laser provided a 8
35 nanosecond pulse width irr2di2tion OI the p211adium contact
36 with 50 Nano-joules O~r ~ 1000 A light, which is substanti211y
37 absorbed within the first ~00 A of amor?hous silicon. A kno~m ~ 1~7 ~
1 quantum efficlency (obtained from other measurements) is used 2 to calculate the number of charges injected into the region 3 at or near the palladium electrode. A pulsed electric ~ield 4 is impressed across the amorphQtls silicon layer b~ applying 5 a known voltage V between the palladium and nichrome electrodes.
6 The electric field is initiated just before the light pulse 7 and is of sufficient duration to examine the transit of vir-8 tually all injected charges, yet shorter than the dielectric 9 relaxation time of the amorphous silicon. A hi~h speed lQ oscilloscope monitors the collection of charges at the ohmic 11 contact with respect to time. A representative curve is 12 shown in Figure 3, trace 50, where the transit time te about 3 equal to 60 nanoseconds. A best fit comparison of the data ~ points of trace 50 as compared with known non-dispersive carrier 15 transport data shows that less than 10% of the charge car-16 riers exhibited dispersive transport.
18 Example 2 is su~stantially similar to ~ample 1 19 in the general arrangement o~ thP deposition chamber, pumping 20 station and gas feed control system except for the dimension 21 changes recited' hereinafter. Preparation of the substrate 22 and the ohmic contact electrode is similarly identîcal, as 23 is the vacuum pumpdown procedure.
24 rn Example 2, R. F. excitation of the glow dis-25 charge is substituted fox the D. CO excitation of Example 26 1, along with several corresponding changes in deposition 27 parameters~ Accordingly, R. F. power is coupled from a con-28 ventional R. F. generator operated at about 13.56 megahertz 29 through a matching network in power supplying relationship 30-to a pair of 8-inch diameter electrodes positioned within 31 t~le deposition chamber. The electrodes are substantially 32 similar to Example 1, except that the interelectrode space 33 is about 2 inches. Furthermore, the R. F. power supply is 34 coupled such that the substrate securing electrode is an 35 anode electrode and the anode need not be electrically 36 coupled to th~ substrate's nichro~e electrode.
Subsequent to purnpclown and purge procedures de-2 scribed heretoEore ln Example 1, high purity silane is bled lnto 3 the deposition chan~er at a rate of about 20 cm3/min or stated in 4 terms of electrode surface area a flow rate of silane of about 5 0.05 cm3/min per cm2 to about 0.06 cm3/ min per cm2 of electrode 6 area and the pumping speed is regulated to sustain a chamber pres-7 sure of about 30 millitorr. The temperature of the substrate is 8 maintained at about 250~C. As described in E~ample 1, the dep-g osition of the initial :Iayers contiguous to the nichrome elec-10 trode may be doped with about 1.09~ phosphene to ensure the ohmi-11 city of the contact. In the deposition of the intrinsic layers of 12 amorphous silicon, the R.F. power supply capacitively couples 3 about 90 watts of R.F. energy to the plasma at a frequency of 13.56 a~ megahertz. It should be noted that the R.F. power was measured by 15 a conventional wattmeter which measures the power input to the 16 deposition system less the amount of reflected power, that is, 17 radiated power loss is not included in this measurement. In the 18 R-F- mode the ca-thode electrode is seïf-biased by the glow dis-19 charge, attaining a negative voltage of about 460 volts. Under 20 these deposition conditions, a 1.0 micron thick film of 21 amorphous silicon i5 deposited in about 30 minutes, corres-22 ponding to a dF~posiiion ra-:e of about 5 A ~second.
23 In a manner ldentical to Example 1, 2 semi-24 transparent layer of palladium is ceposited onto the amor-25 phous silicon, forming a Scno.tky junction thereto. The 26 device was subjected to the same electronic and optical evalua-27 tion tests as described in Exa3nple 1. The R.F. discharge 28 produced device displayed non-dispersive transport havinq a 29 ~najority carrier (electron) mobility about equal to 0.9 30 cm~v-sec.
31 EXAM~?LE 3 32 A ~hin film transistor structure was .abricated 33 having a body of amorphous silicon prep2red in accordance 34 with the deposition par2meters set orth in Examples 1 and 2.
35 A seneral description of the structuxe and the theory of 36 operation of a thin film transistor may be Lound in tor ex-37 ample- "The Insulate~-Gat~ Thin Filla Txansistor" by P. K.
~ j9 .
1 Weimer in "Physics of Thin Films", Vol. 2, pp. 147 (1964).
2 Accordingly, a heavlly doped N type crystalline silicon ~,tafer 3 served both as the substrate and gate electrode of the thin 4 film transistor. A 1000 A thick layer of oxide grown on to~
5 of the Si wafer by conventional thermal oxidation served as 6 the insulating dielectric. A portion of the oxide layer was 7 etched away using hydrofluoric acid to expose the crystalline 8 silicon and the wafer was cleaned using standard semiconductor 9 subs-trate cleaning procedures. The substrate was then covered 10 with a sui~able masking device having a plurality of openings 11 8 mm long, 0.2 ~n wide and spaced apart 1 mm. The mask was 12 positioned such that the openings were only over the remain-13 ing oxide film. The substrate and mask were then placed into 14 a conventional vacuum evaporator. 1000 A of Cr metal were 15 deposited by thermal evaporation at a rate of about 5 A per 16 second from a chrome plated tungsten rod. The substrate was 17 held at approximately room temperature.
18 Without moving the mask, the substrate and mask 19 were then transferred to the aforedescribed plasma deposition chamber approximately 500 A of N - amorphous silicon (doped 21 with PH3) was deposited on top of the Cr fingers using the 22 method described in the foregoing Examples 1 and 2.
23 The chrome/N~ amorphous silicon conductive strips 24 serve interchangeably as the source and drain electrodes of the thin film transistor. The spacing between the finqers 26 which is 1 mm, defines the channel length of the transistor.
27 The plasma chamber was opened, the mask removed from 28 the substrate and replaced by another mask which covered 29 the exposed crystalline silicon of the substrate and about 1 mm of the chrome/N~ amorphous silicon fingers. Approximately 1 31 micron of intrinsic amorphous silicon was then deposited over 32 the remainder of the substrate. The deposition parameters 33 were essentially identical to those set forth in the foreqoinq 34 Example 2. The width of the contact between the chrome/
N+ amorphous silicon fingers and the intrinsic amorphous 36 silicon layer was -therefore approximately 7 mm and defines the 37 channel width of the thin film transistor.
r3 ~
` ~o -`
1 The cornpleted thin film transistor structure '~25 2 removed from the plasma unit and electrical contact was made 3 to the gate, source, and draln electrodes. I'he thin film 4 transistor was tested for i-ts characteristics using conven-5 tional current-vo].tage evaluation techniques. The current 6 voltage characteristics of the thin film transistor were ob-7 tained using conventional equipment and techniques.
8 The ratio of the off resistance to the on-resistance 9 of the device was greater than one thousand. The results 10 demonstrated a switching speed in the dark of less than about 11 20 ms and a switching speed when illuminated of less than about 12 5 ms for drain source potential difference of seven volts. The 13 switching time is consistent with the independently measured 14 mobility of the amorphous silicon.
1 quantum efficlency (obtained from other measurements) is used 2 to calculate the number of charges injected into the region 3 at or near the palladium electrode. A pulsed electric ~ield 4 is impressed across the amorphQtls silicon layer b~ applying 5 a known voltage V between the palladium and nichrome electrodes.
6 The electric field is initiated just before the light pulse 7 and is of sufficient duration to examine the transit of vir-8 tually all injected charges, yet shorter than the dielectric 9 relaxation time of the amorphous silicon. A hi~h speed lQ oscilloscope monitors the collection of charges at the ohmic 11 contact with respect to time. A representative curve is 12 shown in Figure 3, trace 50, where the transit time te about 3 equal to 60 nanoseconds. A best fit comparison of the data ~ points of trace 50 as compared with known non-dispersive carrier 15 transport data shows that less than 10% of the charge car-16 riers exhibited dispersive transport.
18 Example 2 is su~stantially similar to ~ample 1 19 in the general arrangement o~ thP deposition chamber, pumping 20 station and gas feed control system except for the dimension 21 changes recited' hereinafter. Preparation of the substrate 22 and the ohmic contact electrode is similarly identîcal, as 23 is the vacuum pumpdown procedure.
24 rn Example 2, R. F. excitation of the glow dis-25 charge is substituted fox the D. CO excitation of Example 26 1, along with several corresponding changes in deposition 27 parameters~ Accordingly, R. F. power is coupled from a con-28 ventional R. F. generator operated at about 13.56 megahertz 29 through a matching network in power supplying relationship 30-to a pair of 8-inch diameter electrodes positioned within 31 t~le deposition chamber. The electrodes are substantially 32 similar to Example 1, except that the interelectrode space 33 is about 2 inches. Furthermore, the R. F. power supply is 34 coupled such that the substrate securing electrode is an 35 anode electrode and the anode need not be electrically 36 coupled to th~ substrate's nichro~e electrode.
Subsequent to purnpclown and purge procedures de-2 scribed heretoEore ln Example 1, high purity silane is bled lnto 3 the deposition chan~er at a rate of about 20 cm3/min or stated in 4 terms of electrode surface area a flow rate of silane of about 5 0.05 cm3/min per cm2 to about 0.06 cm3/ min per cm2 of electrode 6 area and the pumping speed is regulated to sustain a chamber pres-7 sure of about 30 millitorr. The temperature of the substrate is 8 maintained at about 250~C. As described in E~ample 1, the dep-g osition of the initial :Iayers contiguous to the nichrome elec-10 trode may be doped with about 1.09~ phosphene to ensure the ohmi-11 city of the contact. In the deposition of the intrinsic layers of 12 amorphous silicon, the R.F. power supply capacitively couples 3 about 90 watts of R.F. energy to the plasma at a frequency of 13.56 a~ megahertz. It should be noted that the R.F. power was measured by 15 a conventional wattmeter which measures the power input to the 16 deposition system less the amount of reflected power, that is, 17 radiated power loss is not included in this measurement. In the 18 R-F- mode the ca-thode electrode is seïf-biased by the glow dis-19 charge, attaining a negative voltage of about 460 volts. Under 20 these deposition conditions, a 1.0 micron thick film of 21 amorphous silicon i5 deposited in about 30 minutes, corres-22 ponding to a dF~posiiion ra-:e of about 5 A ~second.
23 In a manner ldentical to Example 1, 2 semi-24 transparent layer of palladium is ceposited onto the amor-25 phous silicon, forming a Scno.tky junction thereto. The 26 device was subjected to the same electronic and optical evalua-27 tion tests as described in Exa3nple 1. The R.F. discharge 28 produced device displayed non-dispersive transport havinq a 29 ~najority carrier (electron) mobility about equal to 0.9 30 cm~v-sec.
31 EXAM~?LE 3 32 A ~hin film transistor structure was .abricated 33 having a body of amorphous silicon prep2red in accordance 34 with the deposition par2meters set orth in Examples 1 and 2.
35 A seneral description of the structuxe and the theory of 36 operation of a thin film transistor may be Lound in tor ex-37 ample- "The Insulate~-Gat~ Thin Filla Txansistor" by P. K.
~ j9 .
1 Weimer in "Physics of Thin Films", Vol. 2, pp. 147 (1964).
2 Accordingly, a heavlly doped N type crystalline silicon ~,tafer 3 served both as the substrate and gate electrode of the thin 4 film transistor. A 1000 A thick layer of oxide grown on to~
5 of the Si wafer by conventional thermal oxidation served as 6 the insulating dielectric. A portion of the oxide layer was 7 etched away using hydrofluoric acid to expose the crystalline 8 silicon and the wafer was cleaned using standard semiconductor 9 subs-trate cleaning procedures. The substrate was then covered 10 with a sui~able masking device having a plurality of openings 11 8 mm long, 0.2 ~n wide and spaced apart 1 mm. The mask was 12 positioned such that the openings were only over the remain-13 ing oxide film. The substrate and mask were then placed into 14 a conventional vacuum evaporator. 1000 A of Cr metal were 15 deposited by thermal evaporation at a rate of about 5 A per 16 second from a chrome plated tungsten rod. The substrate was 17 held at approximately room temperature.
18 Without moving the mask, the substrate and mask 19 were then transferred to the aforedescribed plasma deposition chamber approximately 500 A of N - amorphous silicon (doped 21 with PH3) was deposited on top of the Cr fingers using the 22 method described in the foregoing Examples 1 and 2.
23 The chrome/N~ amorphous silicon conductive strips 24 serve interchangeably as the source and drain electrodes of the thin film transistor. The spacing between the finqers 26 which is 1 mm, defines the channel length of the transistor.
27 The plasma chamber was opened, the mask removed from 28 the substrate and replaced by another mask which covered 29 the exposed crystalline silicon of the substrate and about 1 mm of the chrome/N~ amorphous silicon fingers. Approximately 1 31 micron of intrinsic amorphous silicon was then deposited over 32 the remainder of the substrate. The deposition parameters 33 were essentially identical to those set forth in the foreqoinq 34 Example 2. The width of the contact between the chrome/
N+ amorphous silicon fingers and the intrinsic amorphous 36 silicon layer was -therefore approximately 7 mm and defines the 37 channel width of the thin film transistor.
r3 ~
` ~o -`
1 The cornpleted thin film transistor structure '~25 2 removed from the plasma unit and electrical contact was made 3 to the gate, source, and draln electrodes. I'he thin film 4 transistor was tested for i-ts characteristics using conven-5 tional current-vo].tage evaluation techniques. The current 6 voltage characteristics of the thin film transistor were ob-7 tained using conventional equipment and techniques.
8 The ratio of the off resistance to the on-resistance 9 of the device was greater than one thousand. The results 10 demonstrated a switching speed in the dark of less than about 11 20 ms and a switching speed when illuminated of less than about 12 5 ms for drain source potential difference of seven volts. The 13 switching time is consistent with the independently measured 14 mobility of the amorphous silicon.
Claims (10)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A method for producing an amorphous silicon semiconductor having nondispersive transport of majority carriers and further having a majority carrier mobility higher than about 0.6 cm2/volt-second, said method compris-ing the steps of:
providing a substrate for a deposition of said silicon thereon;
heating said substrate in an atmosphere excluding chamber;
providing a partial pressure of silane in said chamber between about 800 millitorr and 850 millitorr;
sustaining a direct current glow discharge in the vicinity of said heated substrate at a current density between about .05 mA/cm2 and about 0.3 mA/cm2 for a period of time sufficient to deposit a layer of an amorphous silicon semiconductor.
providing a substrate for a deposition of said silicon thereon;
heating said substrate in an atmosphere excluding chamber;
providing a partial pressure of silane in said chamber between about 800 millitorr and 850 millitorr;
sustaining a direct current glow discharge in the vicinity of said heated substrate at a current density between about .05 mA/cm2 and about 0.3 mA/cm2 for a period of time sufficient to deposit a layer of an amorphous silicon semiconductor.
2. A method for producing an improved amorphous silicon semiconductor switching device comprising the steps of:
providing a substrate for the deposition of said amorphous silicon thereon;
heating said substrate to a temperature between about 250°C and 350°C in an atmosphere excluding chamber;
providing a partial pressure of silane in said chamber between 800 millitorr and 850 millitorr;
sustaining a direct current glow discharge at a cur-rent density between about .05 mA/cm2 and 0.3 mA/Cm2 in the vicinity of said substrate for a period of time sufficient to deposit a layer of amorphous silicon thereupon;
forming at least one semiconductor junction to said amorphous silicon whereupon majority carriers in-jected into or generated within said semiconductor are nondispersively transported through said mater-ial under the influence of an electric field at a motility above about 0.6 cm2/volt-second, increasing the switching speed of said device.
providing a substrate for the deposition of said amorphous silicon thereon;
heating said substrate to a temperature between about 250°C and 350°C in an atmosphere excluding chamber;
providing a partial pressure of silane in said chamber between 800 millitorr and 850 millitorr;
sustaining a direct current glow discharge at a cur-rent density between about .05 mA/cm2 and 0.3 mA/Cm2 in the vicinity of said substrate for a period of time sufficient to deposit a layer of amorphous silicon thereupon;
forming at least one semiconductor junction to said amorphous silicon whereupon majority carriers in-jected into or generated within said semiconductor are nondispersively transported through said mater-ial under the influence of an electric field at a motility above about 0.6 cm2/volt-second, increasing the switching speed of said device.
3. The method set forth in claim 1 wherein said partial pressure of silane is maintained between about 800 millitorr and about 850 millitorr by providing a feed rate of gaseous silane of about 10 standard cm3/min and concurrently evacuating said chamber at a rate sufficient to maintain said pressure.
4. The method set forth in claim 3 wherein said glow discharge is sustained by providing a voltage between a generally cylindrical anode and cathode electrode situated in said evacuated chamber, said voltage being between about 700 volts to about 800 volts for a cathode to anode spacing of about 2.5 cm, said anode or cathode having a diameter about equal to about 7.6 cm.
5 . A method for producing an improved amorphous silicon semiconductor having nondispersive majority carrier mobilities higher than about 0.9 cm 2/v-sec, said method comprising the steps of:
providing a substrate for the deposition of said amorphous silicon thereupon;
heating said substrate to a temperature between about 220°C and about 300°C in an atmosphere ex-cluding chamber evacuated to a pressure below about 10-5 torr;
providing a partial pressure of silane in said chamber, said partial pressure of silane being between about 30 millitorr and about 50 millitorr;
sustaining a radio frequency glow discharge having an input power between about 0.2 watts/cm2 and about 0.4 watts/cm2 coupled to at least said partial pressure of silane by means of at least two electrodes, said discharge being sustained in a vicinity of said heated substrate and for a time sufficient to deposit a layer of amorphous silicon.
providing a substrate for the deposition of said amorphous silicon thereupon;
heating said substrate to a temperature between about 220°C and about 300°C in an atmosphere ex-cluding chamber evacuated to a pressure below about 10-5 torr;
providing a partial pressure of silane in said chamber, said partial pressure of silane being between about 30 millitorr and about 50 millitorr;
sustaining a radio frequency glow discharge having an input power between about 0.2 watts/cm2 and about 0.4 watts/cm2 coupled to at least said partial pressure of silane by means of at least two electrodes, said discharge being sustained in a vicinity of said heated substrate and for a time sufficient to deposit a layer of amorphous silicon.
6. A method for producing an improved amorphous silicon semiconductor switching device having nondispersive electron mobilities greater than about 09 cm 2/volt-second, said device constructed by the process comprising:
providing a substrate for the deposition of amorphous silicon thereon;
heating said substrate to a temperature between about 220°C and about 300°C;
providing a-partial pressure of silane in an atmosphere excluding chamber evacuated to a pressure below about 1 torr;
sustaining a radio frequency glow discharge at a cur-rent density between about 0.3 watts/cm2 and 0.4 watts/
cm2 coupled to at least said partial pressure of silane by means of at least two electrodes, said discharge being sustained in a vicinity of said substrate for a period of time sufficient to deposit a layer of amor-phous silicon thereupon;
forming at least one semiconductor junction to said amorphous silicon whereupon majority carriers injected into or generated within said semiconductor are non-dispersively transported through said material under the influence of an electric field at a mobility above about 0.9 cm2/volt-second, increasing the switching speed of said device.
providing a substrate for the deposition of amorphous silicon thereon;
heating said substrate to a temperature between about 220°C and about 300°C;
providing a-partial pressure of silane in an atmosphere excluding chamber evacuated to a pressure below about 1 torr;
sustaining a radio frequency glow discharge at a cur-rent density between about 0.3 watts/cm2 and 0.4 watts/
cm2 coupled to at least said partial pressure of silane by means of at least two electrodes, said discharge being sustained in a vicinity of said substrate for a period of time sufficient to deposit a layer of amor-phous silicon thereupon;
forming at least one semiconductor junction to said amorphous silicon whereupon majority carriers injected into or generated within said semiconductor are non-dispersively transported through said material under the influence of an electric field at a mobility above about 0.9 cm2/volt-second, increasing the switching speed of said device.
7. The method set forth in claim wherein said electrodes comprise two generally cylindrical electrodes spaced in generally parallel relationship having an inter-electrode spacing of about 2.5 cm and each having a mean diameter of about 8 inches.
8. The method of claim 7 wherein said glow discharge is sustained at a R.F. power frequency about equal to 13.56 megahertz.
9. An amorphous silicon semiconductor having nondispersive transport of majority carriers through said semiconductor and further having majority carrier mobility greater than about 0.6 cm2/volt-second.
10. An amorphous semiconductor switching device having increased switching speed comprising a body of amorphous silicon having nondispersive majority carrier transport and further having majority carrier mobilities in excess of about 0.6 cm2/v-sec, said silicon having at least one semi-conductor junction formed thereto.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US148,403 | 1980-05-09 | ||
| US06/148,403 US4546009A (en) | 1979-10-01 | 1980-05-09 | High-mobility amorphous silicon displaying non-dispersive transport properties |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1190126A true CA1190126A (en) | 1985-07-09 |
Family
ID=22525626
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000376096A Expired CA1190126A (en) | 1980-05-09 | 1981-04-23 | High mobility amorphous silicon displaying non- dispersive transport properties |
Country Status (2)
| Country | Link |
|---|---|
| CA (1) | CA1190126A (en) |
| IT (1) | IT1195039B (en) |
-
1981
- 1981-04-23 CA CA000376096A patent/CA1190126A/en not_active Expired
- 1981-05-08 IT IT21602/81A patent/IT1195039B/en active
Also Published As
| Publication number | Publication date |
|---|---|
| IT8121602A0 (en) | 1981-05-08 |
| IT1195039B (en) | 1988-09-28 |
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