CA1098587A - Atrial-ventricular synchronized pacemaker - Google Patents
Atrial-ventricular synchronized pacemakerInfo
- Publication number
- CA1098587A CA1098587A CA294,718A CA294718A CA1098587A CA 1098587 A CA1098587 A CA 1098587A CA 294718 A CA294718 A CA 294718A CA 1098587 A CA1098587 A CA 1098587A
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- Prior art keywords
- atrial
- ventricular
- pulse
- terminal
- signal
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/362—Heart stimulators
- A61N1/365—Heart stimulators controlled by a physiological parameter, e.g. heart potential
- A61N1/368—Heart stimulators controlled by a physiological parameter, e.g. heart potential comprising more than one electrode co-operating with different heart regions
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- Health & Medical Sciences (AREA)
- Cardiology (AREA)
- Heart & Thoracic Surgery (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biophysics (AREA)
- Physiology (AREA)
- Engineering & Computer Science (AREA)
- Biomedical Technology (AREA)
- Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
- Radiology & Medical Imaging (AREA)
- Animal Behavior & Ethology (AREA)
- General Health & Medical Sciences (AREA)
- Public Health (AREA)
- Veterinary Medicine (AREA)
- Electrotherapy Devices (AREA)
Abstract
ABSTRACT OF THE DISCLOSURE
Disclosed is a heart pacemaker comprising circuitry for detecting and, if required, stimulating ventricular action, and circuitry for stimu-lating atrial action. Detection circuitry is provided for detecting atrial action as well as circuitry for triggering ventricular stimulation unless a spontaneous ventricular action follows within a first predetermined time intreval after either a detected spontaneous or a stimulated atrial action.
The pacemaker includes circuitry for triggering an atrial action unless a spontaneous atrial action follows within a second predetermined time interval after either a detected spontaneous or a stimulated ventricular action.
Disclosed is a heart pacemaker comprising circuitry for detecting and, if required, stimulating ventricular action, and circuitry for stimu-lating atrial action. Detection circuitry is provided for detecting atrial action as well as circuitry for triggering ventricular stimulation unless a spontaneous ventricular action follows within a first predetermined time intreval after either a detected spontaneous or a stimulated atrial action.
The pacemaker includes circuitry for triggering an atrial action unless a spontaneous atrial action follows within a second predetermined time interval after either a detected spontaneous or a stimulated ventricular action.
Description
The present invention relates to an electric heart pacemaker com-prising circuit means for detecting and, if required, stimulating ventricular action, and circuit means for detecting and, if required, stimulating atrial action.
In the case of known pacemakers of the above type (e.g. United States-Patent 3,595,242 of Berkovits, issued Ju]y 27, 1~71) the pacemaker monitors the ventricular endocardial ECG and as a function thereof programs both the atrial and the ventricular stimulationO A predetermined first time interval after the last QRS-complex an atrium stimulation, if required, is triggered, whereas at the end of a seeond predetermined time interval after the last QRS-complex the next ventricular stimulation is triggered.
~ccordingly both time periods for atrial ancl ventricular stim~llation are defined by a common reference time, namely the last preceding ventricular action.
Pacemakers of the type outlined above are satisfactory to a limited extent only, In the case of a total AV-bloclc eOg. the atrium and the ventricle are stimulated. In addition the pacemaker does not follow if the atrial rate increases.
Furthermore atrium controlled pacemakers are known in which the atrial depolarization is detected by an electrode positioned wi~hin or on the atri~ and in which after a predetermined interval of e.g. 150 msec. a stimulating pulse is supplied to the ventricleO However, such pacemakers stimulate the ventricle only, whereas there is no a~rial stimulation. On the other hand pacemakers are known which stimula~e the atrium only because in eertain types of diseases the atrium only beats slowly and stimulating of the atrium is sufficient to provide for a properly high ventricular rate.
d~ ~ ~ ;c~/~y Such atrial paeemakers are to be ~ma~4~ y preferred with respect to ventrieular paeemakers beeause the atrial rhythm is maintained in the ease of an intaet AV-conduction and because the risk of embolism is substantially ~, i87 reduced. However, such an atrial stimulation is not applicable in the case of unreliable AV-conduction.
The heart activities within the atrium and the ventricle basically may be distinguished as to bradycardia and normal function in accordance with the following system: Atrium and ventricle beat at a sufficient rate (lst quadrant~; the atrium is beating at an insufficient rate and must be stimulated whereas the ventricle proper]y follows (2nd quadrant); the atrium functions sufficiently, however, the ventricle does not follow (3rd quad-rant); both the atrium and the ventricle require stimulation (4th quadrant).
None of the prior pacemakers may be successfully used in all four bradycardia quadrants.
Finally a so-called synchroni~ed-demand pacemaker is kno~m (The Journal of Thorocic and Cardiovascular Surgery, Volume 61, No.3) which constitutes a modification of the aforementioned atrium controlled ventricular pacemakerO
In the case of this pacemaker ventricular demanding is effected such that ventricular depolarizations occuring within a predetermined time slot cause the suppression of a ventricular stimulation pulse which normally would occur. However, such a pacemaker aoes not allow stimulation within the atrium in the case of atrial bradycardia. In view of the fact that this known pacemaker is an external device the output of the stimulating pulse ~ generator may be connected to the atrial electrode rather than to the ventri-; cular electrodeO However~ in such a case the atrium only and not the ventri-cle will be stimulated. Thereby an operation is obtained which is ~msuitable for different types of diseases/ particularly AV~conduction disturbancesO
Accordingly the utility of this pacemaker likewise is limited.
The basic object of the invention is to provide for a pacemaker which7 if required~ may stimulate the atriu~ and/or the ventricle and which is able to entrain the ventricle when the atrial rate increasesO
Accordingly the pacemaker should be able to provide for a correct function
In the case of known pacemakers of the above type (e.g. United States-Patent 3,595,242 of Berkovits, issued Ju]y 27, 1~71) the pacemaker monitors the ventricular endocardial ECG and as a function thereof programs both the atrial and the ventricular stimulationO A predetermined first time interval after the last QRS-complex an atrium stimulation, if required, is triggered, whereas at the end of a seeond predetermined time interval after the last QRS-complex the next ventricular stimulation is triggered.
~ccordingly both time periods for atrial ancl ventricular stim~llation are defined by a common reference time, namely the last preceding ventricular action.
Pacemakers of the type outlined above are satisfactory to a limited extent only, In the case of a total AV-bloclc eOg. the atrium and the ventricle are stimulated. In addition the pacemaker does not follow if the atrial rate increases.
Furthermore atrium controlled pacemakers are known in which the atrial depolarization is detected by an electrode positioned wi~hin or on the atri~ and in which after a predetermined interval of e.g. 150 msec. a stimulating pulse is supplied to the ventricleO However, such pacemakers stimulate the ventricle only, whereas there is no a~rial stimulation. On the other hand pacemakers are known which stimula~e the atrium only because in eertain types of diseases the atrium only beats slowly and stimulating of the atrium is sufficient to provide for a properly high ventricular rate.
d~ ~ ~ ;c~/~y Such atrial paeemakers are to be ~ma~4~ y preferred with respect to ventrieular paeemakers beeause the atrial rhythm is maintained in the ease of an intaet AV-conduction and because the risk of embolism is substantially ~, i87 reduced. However, such an atrial stimulation is not applicable in the case of unreliable AV-conduction.
The heart activities within the atrium and the ventricle basically may be distinguished as to bradycardia and normal function in accordance with the following system: Atrium and ventricle beat at a sufficient rate (lst quadrant~; the atrium is beating at an insufficient rate and must be stimulated whereas the ventricle proper]y follows (2nd quadrant); the atrium functions sufficiently, however, the ventricle does not follow (3rd quad-rant); both the atrium and the ventricle require stimulation (4th quadrant).
None of the prior pacemakers may be successfully used in all four bradycardia quadrants.
Finally a so-called synchroni~ed-demand pacemaker is kno~m (The Journal of Thorocic and Cardiovascular Surgery, Volume 61, No.3) which constitutes a modification of the aforementioned atrium controlled ventricular pacemakerO
In the case of this pacemaker ventricular demanding is effected such that ventricular depolarizations occuring within a predetermined time slot cause the suppression of a ventricular stimulation pulse which normally would occur. However, such a pacemaker aoes not allow stimulation within the atrium in the case of atrial bradycardia. In view of the fact that this known pacemaker is an external device the output of the stimulating pulse ~ generator may be connected to the atrial electrode rather than to the ventri-; cular electrodeO However~ in such a case the atrium only and not the ventri-cle will be stimulated. Thereby an operation is obtained which is ~msuitable for different types of diseases/ particularly AV~conduction disturbancesO
Accordingly the utility of this pacemaker likewise is limited.
The basic object of the invention is to provide for a pacemaker which7 if required~ may stimulate the atriu~ and/or the ventricle and which is able to entrain the ventricle when the atrial rate increasesO
Accordingly the pacemaker should be able to provide for a correct function
- 2 -', ' '': ' S~37 within all four aforementioned bradycardia quadrants.
Starting from a pacema~er of the type mentioned in the first pa-aragraph this problem in accordance with the invention is solved by the provision of circuit means for detecting atrial action and further circuit means for triggering ventricular stimulation unless a spontaneous ventricular action follows within a first predetermined time interval after either a detected spontaneous or a stimulated atrial action, as well as circuit means for triggering an a-trial action unless a spontaneous atrial action follows within a second predetermined time interval after either a detected spont-aneous or a stimulated ventricular action.
The solution of the in~ention is based on the concept of complete-ly electronically simulating the normally occuring heart cycle exteriorly of the heart and to force this external control cycle on the heart in the case of physiological disturbances which indicate the need for pacing within the atriwn or the ventricle, wherein the heart, to the extent it functions properly~ is able to suppress each individual partial function of the pace-maker. ~ccordingly the pacemaker may stimulate in the atriwm only or in the ventricle only; it likewise may stimulate both within the atrium and the ven~ -tricle. If required an increased atrial rate is conducted to the ventricle.
IP required, i.e. in the case of all functions of the heart being undisturbed, neither the atrium nor the ventricle are stimulated.
Preferably the circuit means for triggering ventricular and atri-al stimulation are interconnected so that the end of said first predeter-mi~ed time interval triggers the beginning of said second predetermined time interval and that the end of said second predetermined time interval triggers the beginning of said first predetermined time intervalO Accordingly a stimulating pulse is delivered to the ventricle if no ventricular contrac-tion follows a spontaneous P-wave or a provoked atrial contraction within the predetermined first time interval. This pulse does not occur in the . - , . ~ . .................. .
5~3~
case of timely spontaneous ventricular activity. ~n atrial stimulating signal follows at the end of the second predetermined time interval after a ventricular pulse, irrespective of this ventricular pulse occuring sponta-neously or being caused by pacemaker depolarization, urless a spontaneous atrial activity has been detected in due time~
Advantageously the circuit means for triggering ventricular stimu-lation and the circuit means for triggering atrial stimulation each include a monostable multivibrator which determines said first and said second predetermined time interval, respectively.
Preferably the first and the second predetermined time in~ervals are between 120 msec. and 200 msec~ and between 600 msec. and 750 msec ., - respectively.
Preferably an associated unipolar electrode is provided for detect-ing and stimulating the atrial and the ventricular action, respectively, whereas the pacemalcer casing constitutes the common neutral electrode.
According to a further development of the invention the circuit means for stimulating atrial action include an output capacitor adapted to be charged through first switch means and to be discharged through second switch means. This provides~ after the output capacitor has been quickly 2~ charged, for a high input impedance of the atrial signal detecting circuit means and accordingly for an improved P-detection. If contrary thereto the circuit means for ventricular stimulation are designed in a conventional manner, a safe distinction between atrial and ventricular pulses in the EC~ is possibleO In this connection a particularly simple circuit arrange-; ment is obtained in that an atrial stim~lation triggering signal is adapted to control both switch means and that the charging switch means are preceded by time delay means. Thereby one and the same signal at first provides for the immediate triggering of the discharging switch means and for the cor-respondingly delayed subsequent actuation of the charging switch meansO
... ~ ; :.
~ Q ~ ~7 Preferably the switch means for detecting ventricular action have associated thereto disabling means adapted to disable detection of ventricular action for a predetermined time period when an atrial stimulation is triggered. For -the purpose of testing suitably -the first and/or the second time interval are adapted to be shortened.
In conrormity with a further development of the invention the circuit means for detecting atrial action and~or the circuit means for detecting ventricular action comprise refractory means for blocking the detection of signals the frequency of which exceeds a predetermined maximum value. When such high-frequency noise signals are received, the circuit means for atrial and/or ventricular detection are disabled; the pacemaker will operate at fixed freq~lencies.
Thus, in accordance with one broad aspect of the invention, there is provided an electric heart pacemaker compris-ing circuit means for detecting and, if required, stimulating ventricular action, and circuit means for stimulating atrial action, characterized by circuit means for detecting atrial action and further circuit means for triggering ventricular stimulation unless a spontaneous ventricular action follows with-in a first predetermined time interval after either a detected spontaneous or a stimulated atrial action, as well as circuit means for triggering an atrial action unless a spontaneous atrial action follows within a second predetermined time interval after either a detected spontaneo~s or a stimulated ventricular action.
In accordance with another broad aspect of the invention there. is provided a cardiac pacemaker pulse generator comprising: first terminal means adapted to being connected to the atrium of a heart; second terminal means adapted to being connected to the ventricle of said hQart; first sensing means ^5-.~
~13S1~7 connected to said first terminal means for providing a signal whenever a signal indicative of an atrial contraction is applied to said first terminal; second sensing means connected to said second terminal for providing a signal whenever a signal indica-tive of a ventricular contraction is applied to said second terminal; and circuit means responsive to said first and second sensing means for providing pulse signals to said first and second terminal means in the absence of signals from said first and second sensing means within constant defined times, said circuit means including first and second defined time int~rval determining means, said first defined time interval being the time between the occurrence of an atrial contraction and the provision of a pulse to said second terminal means and said ~econd defined time interval being the time between the occurr-ence of a ventricular contraction and the provision of a pulse to said first terminal means.
~ ccording to another broad aspect of the invention, there is provided a dual pace - dual sense cardiac pacemaker pulse generator comprising: a ventricular terminal adapted to being electrically coupled to the.ventricle of the hearti an atrial terminal adapted to being electrically coupled to the atrium of the heart; ventricular sensing means for providing a signal ln response to electric signals applied to said ventri-. cular terminal which manifest natural ventricular contractions; .
atrial sensing means for providing a signal in response to electrical signals applied to said atrial terminal which manifest natural atrial contractions; ventricular pulse providing means for providing ventricular stimulating pulses to said ventricular terminal; atrial pulse providing means for providing atrial ~ -stimulating pulses to said atrial terminal; and circuit inter-connect means for causing said ventricular pulse providing means to provide a ventricular stimulating pulse a first constant . :
-5a-~ . .
~ f i , .
ii8~
defined time after either a signal from said atrial sensing means or said atrial pulse providing means is provided unless a signal from said ventricular sensing means occurs prior in time, said circuit interconnect means further causing said atrial pulse providing means to provide an atrial stimulating pulse after the passage of a second constant defined time after either a ventricular signal was sensed or a ventricular stimulating pulse was applied to said ventricular terminal, unless a signal from said atrial sensing means occurs prior in time.
In the following the invention is further described in connection with preferred embodiments. In the attached drawings:
Figure 1 illustrates a schematic wiring diagram of a first embodiment, and Figure 2 illustrates a schematic wiring diagram of a modified second embodiment.
In the embodiment of Figure 1 an electrode 10 is provided for supplying stimulating signals to the atrium and to detect natural atrium activity. In a similar manner an electrode 12 is adapted for connection to the ~entricle to suppl~ stimu-lating pulses thereto and to detect naturally occurringventriclepulses. The atrium electrode 10 is connected to a first input 18 of a NOR-gate 19 through an atrium signal amplifier 14, a posi-tive edge retriygering monostable flip flop 15 provided for noise suppression and having a delay period of 100 msec., as well as through a differentiator consisting of a capacitor 16 and a resistor 17~
The ventricle electrode 12 communicates with a first input 23 of a NOR-gate 24 through a ventricle signal amplifier 20 and an inverter 22. The output of NOR-gate 24 is connected to a first input 29 of a NOR-gate 30 ~5b-.~ .
.
through a positive edge retriggering 100 msec. monostable flip flop 26 and a differentiator consisting of a capacitor 27 and a resistor 28. Mono-stable flip flop 26 is provided for noise suppression purposes.
The output of NOR-gate 19 is connected to the input of a negative edge triggering ~00 msec. monostable flip flop 32 defining a refractory period. The output of monostable flip flop 32 is connected to the input of a negative edge triggering monostable flip flop 34 having a delay period of 150 msec. Monostable flip flop 34 defines the PQ-distance. Its output Q communicates through a differentiator defined by a capacitor 35 and a resistor 36, with a first input 37 of a NOR-gate 38~ The output of NOR-gate 38 is connected to a second input 39 of NOR-gate 30.
The output of NOR-gate 30 is connected to the input of a negative edge triggering 300 msec. monostable flip flop 42 defining a refractory period. The output Q of monostable flip flop 42 i5 connected through a dif-ferentiator comprising a capacitor 43 and a resistor 44 to a first input of a NOR-gate 46. The output Q of monostable flip M op 42 is further con-nected by a line 47 to a second input 49 of NOR-gate 38. A second input 50 of NOR-gate 46 is connected through a differentiator consisting of a capacitor 52 and a resistor 53 to a second output 54 of monostable flip Mop 32. The output of NOR-gate 46 is connected to the input of a negative edge retriggering monostable flip flop 56 having a delay period of 700 ms and defining the QP-distance. The output Q of monostable flip flop 56 is con-nected by a line 57 to a second input 58 of NOR-gate 19 and to the input of a positive edge triggering monostable flip flop 60. Monostab]e flip flop 60 has a delay period of 0.5 msec. and serves as a pulse shaper. The out- -put Q of monostable flip flop 60 is connected to the base of a PNP transistor 62 through the series connection of a resistor 63 and a capacitor 64. The base of transistor 62 is further connected through a diode 65 to the posi-tive terminal of the voltage supply. In addition output Q of monostable flip flop 60 is connected to the base of an NPN transistor 68 through a 85~7 resistor 67. The emitter-collector paths of transistors 62 and 68 are series connected between positive voltage and ground. The junction 69 of the collectors of transistors 62 and 68 is connected to one side of an output capacitor 70, the other side of which communicates with atrium electrode 10.
The input of a positive edge triggering pulse shaper monostable flip flop 72 having a delay period of 0.5 msec. is connected to the output of NOR-gate 38. The output Q monostable flip flop 72 communicates through a resistor 73 with the base of an output transistor 74 the collector-emitter path of which is connected in series with a resistor 75 between positive supply voltage and ground. The collector of transistor 74 is connected to one side of an ou~put capacitor 76, the other side of which communicates with ventricle electrode 12.
The output Q of monostable flip flop 56 additionally is connected to the input of a positive edge triggering 40 msec~ monostable flip flop 780 The output Q of monostable flip flop 78 is connected to a second input 79 of NOR-gate 24.
The circuit arrAngement of Figure 1 basically operates as follows:
At the input of monostable flip flop 32 an information in the form of a pulse step appears when, through input 58 of NOR-gate 19, the informa-tion of the atrium having been stimulated is supplied, or when, throughinput 18 of gate 19~ the information has been received that a spontaneous atrium activity has taken place. ~ccordingly a pulse step triggering the 400 msec. period always appears at the input of monostable flip flop 32 when the atrium is depolarized by a stimulating pulse or when thereis a spontaneous excitation of the atriumO ~imultaneously with setting of mono-stable fl~p flop 32 the input of monostable flip flop 34 is triggered from the output Q of monostablé flip flop 32 thereby starting the 150 msecO
period of monostable flip flop 34. After the 150 msec. period of monostable flip flop 34 has elapsed a pulse is delivered through the dynamic input 35, 36, 37 of gate 38 to the output of this gate which pulse is supplied through the 0.5 msec. pulse shaper monostable flip flop 72 to the conven-tionally designed ventricle stimulation output stage 73 to 76 and is supplied to the ventricle through electrode 12.
The pulse appearing at the output of gate 38 additionally is supplied to the input 39 of gate 30 and is passed to the input of monostable flip flop 42. The pulse thereby starts the refractory period of 300 msecO
Furthermore this pulse is supplied to the input 45 of gate 46 and to the input monostable flip flop 56 which is triggeredO The 700 msecO delay period of monostable flip flop 56 is started.
Similar to the conditions at the input of monostable flip flop 32 a signal appears at the input of monostable flip flop 42 when a ventricle pulse has been delivered from the output of gate 38 or when a signal characteristic of a spontaneous depolari~ation of the ventricle is received at gate 30. Accordingly it does not make any difference for the triggering of monostable flip flop 42 whether the ventricle is stimulated or has been spontaneously activated. By the appearence of a pulse step at the input of monostable flip flop 42 the retriggerable monostable flip flop 56 is again started. Therefore 700 msec. must elapse after a ventricle depolari7ation, irrespective whethar it occured spontaneously or by stimulating, before the output Q of monostable flip flop 56 goes high and an atrium~pulse is delivered through conductor 57.
If the atrium activity spontaneously becomes faster than the rate corresponding to the intervention frequency of the pacemaker~ the P-wave upon having been amplified in the atrium signal amplifier ]4 again enters monostable flip flop 32 through input 18 of gate 19. The respective pulse is delivered from the output 54 of monostable flip flop 32 to the dynamic input 50 of gate 460 The pulse is transferred from gate 46 to monostable flip flop 560 Accordingly at first no further atrium pulse can be delivered after a spontaneous atrium pulse for a period of at least 700 msec (the 3S~7 delay period of monostable flip flip 56). Because this spontaneous atrium pulse again activates the ventricle through monostable flip flop 34 after 150 msec. and the monostable flip flop 56 is retriggered through gates 38 and 30 and monstable flip flop 42, the atrium in fact is not again triggered before a period of 700 msec. + 150 msec. = 850 msec. has elapsed after a spontaneous P-wave.
An atrium pulse s~hould result in a ventricle depolari~ation after 150 msecO, i.eO the delay period of monostable flip flop 34. However, it might be that this ventricle depolarization spontaneously occurs within the desired period. In this case the ventricle depolarizing pulse has no physiological function. Therefore it is desired to suppress this pulse in order to save energy and for other reasons. For this purpose a feedback is provided from the output of monostable flip flop 42 over line 47 to the input 49 of gate 380 The function of this feedback is as follows: If the 150 msec. pulse of monostable ~lip flop 34 has nearly reached its end and in case a ventricle pulse therefore would be delivered to the ventricle through the output of gate 38~ this is prevented by the ventricle activity having at this time again triggered the 300 msec. delay period at the input of ~ monostable flip flop 42. The potential appearing at the output Q of mono-stable flip flop 42 now disables gate 38 through line 47. The pulse step appearing after the 150 msec. delay period of monostable flip flop 34 there-fore cannot be transferred to the ventricle through gate 380 Accordingly the unnecessary ventricle depolarization pulse does not occur if there~was a spontaneous ventricle depolarization within the 150 msec. delay period. -In the following the mode of operation of the circuit arrangement of Figure 1 in the four different bradycardia quadrants is describedO At first it is assumed that the atrium as well as the yentricle beat at a suf-ficiently high rate and that therefore stimulation is not required (lst quadrant~. The spontaneous P-signal received by the atrium electrode 10 _ 9 _ - . . - :: : .. . , .., .:
.
35~37 is supplied to the input of monostable flip flop 32 and, through the output 54 of monostable flip flop 32 and the input 50 of gate 46, suppresses the delivery of a P-informa~ion through the output Q of monostable flip flop 56, because monostable flip flop 56 is retriggeredO The timely occurring ventricle action in turn suppresses the delivery of a pulse to the ventricle by setting monostable flip flop 42 via line 47 and input 49 of gate 38.
Accordingly the atrium and the ventricle are not stimulated when the atrium activity occurs at a sufficiently high rate and when the ventricle responds in due time.
In the case of atrium bradycardia in which the atrium must be sti-mulated whereas the conduction to the ventric}e is intact (2nd quadrant), -the information that an atrium depolarization is to be effected by a pulse, is supplied to the input of monostable flip flop 60 through the output Q
of monostable flip flop 56 and line 57 after termination of the 700 msec.
delay period of monostable flip flop 56 because in the meantime monostable ; flip flop 56 is not retriggered. The 150 msec. delay period monostable flip flop 34 is started~ Before this 150 msec. period has elapsed a spontaneous ventricle polarization occurs which is delivered to monostable flip flop 42 through ventricle signal amp]ifier 20, gate 24, monostable flip flop 26 and gate 30. Monostable flip flop 42 is triggered and disables via lune 47 the transfer of the ventricle stimulating pulse from output Q of monostable flip flop 34 to monostable flip flop 7~. Thus the ventricle pulse is suppressed in retrograde.
If on the other hand ~he atrium beats at a sufficient and possibly substantially higher than normal rate up to a frequency of 150 beats/min.~
whereas the conduction to the ventricle is poor (3rd quadrant), the follow ing happens: Spontaneous P-signals are delivered from the atrium electrode 10 to the input of monostable flip flop 32 and start the 400 msec. refractory period defined by this monostable flip flop. Simultaneously monostable flip
Starting from a pacema~er of the type mentioned in the first pa-aragraph this problem in accordance with the invention is solved by the provision of circuit means for detecting atrial action and further circuit means for triggering ventricular stimulation unless a spontaneous ventricular action follows within a first predetermined time interval after either a detected spontaneous or a stimulated atrial action, as well as circuit means for triggering an a-trial action unless a spontaneous atrial action follows within a second predetermined time interval after either a detected spont-aneous or a stimulated ventricular action.
The solution of the in~ention is based on the concept of complete-ly electronically simulating the normally occuring heart cycle exteriorly of the heart and to force this external control cycle on the heart in the case of physiological disturbances which indicate the need for pacing within the atriwn or the ventricle, wherein the heart, to the extent it functions properly~ is able to suppress each individual partial function of the pace-maker. ~ccordingly the pacemaker may stimulate in the atriwm only or in the ventricle only; it likewise may stimulate both within the atrium and the ven~ -tricle. If required an increased atrial rate is conducted to the ventricle.
IP required, i.e. in the case of all functions of the heart being undisturbed, neither the atrium nor the ventricle are stimulated.
Preferably the circuit means for triggering ventricular and atri-al stimulation are interconnected so that the end of said first predeter-mi~ed time interval triggers the beginning of said second predetermined time interval and that the end of said second predetermined time interval triggers the beginning of said first predetermined time intervalO Accordingly a stimulating pulse is delivered to the ventricle if no ventricular contrac-tion follows a spontaneous P-wave or a provoked atrial contraction within the predetermined first time interval. This pulse does not occur in the . - , . ~ . .................. .
5~3~
case of timely spontaneous ventricular activity. ~n atrial stimulating signal follows at the end of the second predetermined time interval after a ventricular pulse, irrespective of this ventricular pulse occuring sponta-neously or being caused by pacemaker depolarization, urless a spontaneous atrial activity has been detected in due time~
Advantageously the circuit means for triggering ventricular stimu-lation and the circuit means for triggering atrial stimulation each include a monostable multivibrator which determines said first and said second predetermined time interval, respectively.
Preferably the first and the second predetermined time in~ervals are between 120 msec. and 200 msec~ and between 600 msec. and 750 msec ., - respectively.
Preferably an associated unipolar electrode is provided for detect-ing and stimulating the atrial and the ventricular action, respectively, whereas the pacemalcer casing constitutes the common neutral electrode.
According to a further development of the invention the circuit means for stimulating atrial action include an output capacitor adapted to be charged through first switch means and to be discharged through second switch means. This provides~ after the output capacitor has been quickly 2~ charged, for a high input impedance of the atrial signal detecting circuit means and accordingly for an improved P-detection. If contrary thereto the circuit means for ventricular stimulation are designed in a conventional manner, a safe distinction between atrial and ventricular pulses in the EC~ is possibleO In this connection a particularly simple circuit arrange-; ment is obtained in that an atrial stim~lation triggering signal is adapted to control both switch means and that the charging switch means are preceded by time delay means. Thereby one and the same signal at first provides for the immediate triggering of the discharging switch means and for the cor-respondingly delayed subsequent actuation of the charging switch meansO
... ~ ; :.
~ Q ~ ~7 Preferably the switch means for detecting ventricular action have associated thereto disabling means adapted to disable detection of ventricular action for a predetermined time period when an atrial stimulation is triggered. For -the purpose of testing suitably -the first and/or the second time interval are adapted to be shortened.
In conrormity with a further development of the invention the circuit means for detecting atrial action and~or the circuit means for detecting ventricular action comprise refractory means for blocking the detection of signals the frequency of which exceeds a predetermined maximum value. When such high-frequency noise signals are received, the circuit means for atrial and/or ventricular detection are disabled; the pacemaker will operate at fixed freq~lencies.
Thus, in accordance with one broad aspect of the invention, there is provided an electric heart pacemaker compris-ing circuit means for detecting and, if required, stimulating ventricular action, and circuit means for stimulating atrial action, characterized by circuit means for detecting atrial action and further circuit means for triggering ventricular stimulation unless a spontaneous ventricular action follows with-in a first predetermined time interval after either a detected spontaneous or a stimulated atrial action, as well as circuit means for triggering an atrial action unless a spontaneous atrial action follows within a second predetermined time interval after either a detected spontaneo~s or a stimulated ventricular action.
In accordance with another broad aspect of the invention there. is provided a cardiac pacemaker pulse generator comprising: first terminal means adapted to being connected to the atrium of a heart; second terminal means adapted to being connected to the ventricle of said hQart; first sensing means ^5-.~
~13S1~7 connected to said first terminal means for providing a signal whenever a signal indicative of an atrial contraction is applied to said first terminal; second sensing means connected to said second terminal for providing a signal whenever a signal indica-tive of a ventricular contraction is applied to said second terminal; and circuit means responsive to said first and second sensing means for providing pulse signals to said first and second terminal means in the absence of signals from said first and second sensing means within constant defined times, said circuit means including first and second defined time int~rval determining means, said first defined time interval being the time between the occurrence of an atrial contraction and the provision of a pulse to said second terminal means and said ~econd defined time interval being the time between the occurr-ence of a ventricular contraction and the provision of a pulse to said first terminal means.
~ ccording to another broad aspect of the invention, there is provided a dual pace - dual sense cardiac pacemaker pulse generator comprising: a ventricular terminal adapted to being electrically coupled to the.ventricle of the hearti an atrial terminal adapted to being electrically coupled to the atrium of the heart; ventricular sensing means for providing a signal ln response to electric signals applied to said ventri-. cular terminal which manifest natural ventricular contractions; .
atrial sensing means for providing a signal in response to electrical signals applied to said atrial terminal which manifest natural atrial contractions; ventricular pulse providing means for providing ventricular stimulating pulses to said ventricular terminal; atrial pulse providing means for providing atrial ~ -stimulating pulses to said atrial terminal; and circuit inter-connect means for causing said ventricular pulse providing means to provide a ventricular stimulating pulse a first constant . :
-5a-~ . .
~ f i , .
ii8~
defined time after either a signal from said atrial sensing means or said atrial pulse providing means is provided unless a signal from said ventricular sensing means occurs prior in time, said circuit interconnect means further causing said atrial pulse providing means to provide an atrial stimulating pulse after the passage of a second constant defined time after either a ventricular signal was sensed or a ventricular stimulating pulse was applied to said ventricular terminal, unless a signal from said atrial sensing means occurs prior in time.
In the following the invention is further described in connection with preferred embodiments. In the attached drawings:
Figure 1 illustrates a schematic wiring diagram of a first embodiment, and Figure 2 illustrates a schematic wiring diagram of a modified second embodiment.
In the embodiment of Figure 1 an electrode 10 is provided for supplying stimulating signals to the atrium and to detect natural atrium activity. In a similar manner an electrode 12 is adapted for connection to the ~entricle to suppl~ stimu-lating pulses thereto and to detect naturally occurringventriclepulses. The atrium electrode 10 is connected to a first input 18 of a NOR-gate 19 through an atrium signal amplifier 14, a posi-tive edge retriygering monostable flip flop 15 provided for noise suppression and having a delay period of 100 msec., as well as through a differentiator consisting of a capacitor 16 and a resistor 17~
The ventricle electrode 12 communicates with a first input 23 of a NOR-gate 24 through a ventricle signal amplifier 20 and an inverter 22. The output of NOR-gate 24 is connected to a first input 29 of a NOR-gate 30 ~5b-.~ .
.
through a positive edge retriggering 100 msec. monostable flip flop 26 and a differentiator consisting of a capacitor 27 and a resistor 28. Mono-stable flip flop 26 is provided for noise suppression purposes.
The output of NOR-gate 19 is connected to the input of a negative edge triggering ~00 msec. monostable flip flop 32 defining a refractory period. The output of monostable flip flop 32 is connected to the input of a negative edge triggering monostable flip flop 34 having a delay period of 150 msec. Monostable flip flop 34 defines the PQ-distance. Its output Q communicates through a differentiator defined by a capacitor 35 and a resistor 36, with a first input 37 of a NOR-gate 38~ The output of NOR-gate 38 is connected to a second input 39 of NOR-gate 30.
The output of NOR-gate 30 is connected to the input of a negative edge triggering 300 msec. monostable flip flop 42 defining a refractory period. The output Q of monostable flip flop 42 i5 connected through a dif-ferentiator comprising a capacitor 43 and a resistor 44 to a first input of a NOR-gate 46. The output Q of monostable flip M op 42 is further con-nected by a line 47 to a second input 49 of NOR-gate 38. A second input 50 of NOR-gate 46 is connected through a differentiator consisting of a capacitor 52 and a resistor 53 to a second output 54 of monostable flip Mop 32. The output of NOR-gate 46 is connected to the input of a negative edge retriggering monostable flip flop 56 having a delay period of 700 ms and defining the QP-distance. The output Q of monostable flip flop 56 is con-nected by a line 57 to a second input 58 of NOR-gate 19 and to the input of a positive edge triggering monostable flip flop 60. Monostab]e flip flop 60 has a delay period of 0.5 msec. and serves as a pulse shaper. The out- -put Q of monostable flip flop 60 is connected to the base of a PNP transistor 62 through the series connection of a resistor 63 and a capacitor 64. The base of transistor 62 is further connected through a diode 65 to the posi-tive terminal of the voltage supply. In addition output Q of monostable flip flop 60 is connected to the base of an NPN transistor 68 through a 85~7 resistor 67. The emitter-collector paths of transistors 62 and 68 are series connected between positive voltage and ground. The junction 69 of the collectors of transistors 62 and 68 is connected to one side of an output capacitor 70, the other side of which communicates with atrium electrode 10.
The input of a positive edge triggering pulse shaper monostable flip flop 72 having a delay period of 0.5 msec. is connected to the output of NOR-gate 38. The output Q monostable flip flop 72 communicates through a resistor 73 with the base of an output transistor 74 the collector-emitter path of which is connected in series with a resistor 75 between positive supply voltage and ground. The collector of transistor 74 is connected to one side of an ou~put capacitor 76, the other side of which communicates with ventricle electrode 12.
The output Q of monostable flip flop 56 additionally is connected to the input of a positive edge triggering 40 msec~ monostable flip flop 780 The output Q of monostable flip flop 78 is connected to a second input 79 of NOR-gate 24.
The circuit arrAngement of Figure 1 basically operates as follows:
At the input of monostable flip flop 32 an information in the form of a pulse step appears when, through input 58 of NOR-gate 19, the informa-tion of the atrium having been stimulated is supplied, or when, throughinput 18 of gate 19~ the information has been received that a spontaneous atrium activity has taken place. ~ccordingly a pulse step triggering the 400 msec. period always appears at the input of monostable flip flop 32 when the atrium is depolarized by a stimulating pulse or when thereis a spontaneous excitation of the atriumO ~imultaneously with setting of mono-stable fl~p flop 32 the input of monostable flip flop 34 is triggered from the output Q of monostablé flip flop 32 thereby starting the 150 msecO
period of monostable flip flop 34. After the 150 msec. period of monostable flip flop 34 has elapsed a pulse is delivered through the dynamic input 35, 36, 37 of gate 38 to the output of this gate which pulse is supplied through the 0.5 msec. pulse shaper monostable flip flop 72 to the conven-tionally designed ventricle stimulation output stage 73 to 76 and is supplied to the ventricle through electrode 12.
The pulse appearing at the output of gate 38 additionally is supplied to the input 39 of gate 30 and is passed to the input of monostable flip flop 42. The pulse thereby starts the refractory period of 300 msecO
Furthermore this pulse is supplied to the input 45 of gate 46 and to the input monostable flip flop 56 which is triggeredO The 700 msecO delay period of monostable flip flop 56 is started.
Similar to the conditions at the input of monostable flip flop 32 a signal appears at the input of monostable flip flop 42 when a ventricle pulse has been delivered from the output of gate 38 or when a signal characteristic of a spontaneous depolari~ation of the ventricle is received at gate 30. Accordingly it does not make any difference for the triggering of monostable flip flop 42 whether the ventricle is stimulated or has been spontaneously activated. By the appearence of a pulse step at the input of monostable flip flop 42 the retriggerable monostable flip flop 56 is again started. Therefore 700 msec. must elapse after a ventricle depolari7ation, irrespective whethar it occured spontaneously or by stimulating, before the output Q of monostable flip flop 56 goes high and an atrium~pulse is delivered through conductor 57.
If the atrium activity spontaneously becomes faster than the rate corresponding to the intervention frequency of the pacemaker~ the P-wave upon having been amplified in the atrium signal amplifier ]4 again enters monostable flip flop 32 through input 18 of gate 19. The respective pulse is delivered from the output 54 of monostable flip flop 32 to the dynamic input 50 of gate 460 The pulse is transferred from gate 46 to monostable flip flop 560 Accordingly at first no further atrium pulse can be delivered after a spontaneous atrium pulse for a period of at least 700 msec (the 3S~7 delay period of monostable flip flip 56). Because this spontaneous atrium pulse again activates the ventricle through monostable flip flop 34 after 150 msec. and the monostable flip flop 56 is retriggered through gates 38 and 30 and monstable flip flop 42, the atrium in fact is not again triggered before a period of 700 msec. + 150 msec. = 850 msec. has elapsed after a spontaneous P-wave.
An atrium pulse s~hould result in a ventricle depolari~ation after 150 msecO, i.eO the delay period of monostable flip flop 34. However, it might be that this ventricle depolarization spontaneously occurs within the desired period. In this case the ventricle depolarizing pulse has no physiological function. Therefore it is desired to suppress this pulse in order to save energy and for other reasons. For this purpose a feedback is provided from the output of monostable flip flop 42 over line 47 to the input 49 of gate 380 The function of this feedback is as follows: If the 150 msec. pulse of monostable ~lip flop 34 has nearly reached its end and in case a ventricle pulse therefore would be delivered to the ventricle through the output of gate 38~ this is prevented by the ventricle activity having at this time again triggered the 300 msec. delay period at the input of ~ monostable flip flop 42. The potential appearing at the output Q of mono-stable flip flop 42 now disables gate 38 through line 47. The pulse step appearing after the 150 msec. delay period of monostable flip flop 34 there-fore cannot be transferred to the ventricle through gate 380 Accordingly the unnecessary ventricle depolarization pulse does not occur if there~was a spontaneous ventricle depolarization within the 150 msec. delay period. -In the following the mode of operation of the circuit arrangement of Figure 1 in the four different bradycardia quadrants is describedO At first it is assumed that the atrium as well as the yentricle beat at a suf-ficiently high rate and that therefore stimulation is not required (lst quadrant~. The spontaneous P-signal received by the atrium electrode 10 _ 9 _ - . . - :: : .. . , .., .:
.
35~37 is supplied to the input of monostable flip flop 32 and, through the output 54 of monostable flip flop 32 and the input 50 of gate 46, suppresses the delivery of a P-informa~ion through the output Q of monostable flip flop 56, because monostable flip flop 56 is retriggeredO The timely occurring ventricle action in turn suppresses the delivery of a pulse to the ventricle by setting monostable flip flop 42 via line 47 and input 49 of gate 38.
Accordingly the atrium and the ventricle are not stimulated when the atrium activity occurs at a sufficiently high rate and when the ventricle responds in due time.
In the case of atrium bradycardia in which the atrium must be sti-mulated whereas the conduction to the ventric}e is intact (2nd quadrant), -the information that an atrium depolarization is to be effected by a pulse, is supplied to the input of monostable flip flop 60 through the output Q
of monostable flip flop 56 and line 57 after termination of the 700 msec.
delay period of monostable flip flop 56 because in the meantime monostable ; flip flop 56 is not retriggered. The 150 msec. delay period monostable flip flop 34 is started~ Before this 150 msec. period has elapsed a spontaneous ventricle polarization occurs which is delivered to monostable flip flop 42 through ventricle signal amp]ifier 20, gate 24, monostable flip flop 26 and gate 30. Monostable flip flop 42 is triggered and disables via lune 47 the transfer of the ventricle stimulating pulse from output Q of monostable flip flop 34 to monostable flip flop 7~. Thus the ventricle pulse is suppressed in retrograde.
If on the other hand ~he atrium beats at a sufficient and possibly substantially higher than normal rate up to a frequency of 150 beats/min.~
whereas the conduction to the ventricle is poor (3rd quadrant), the follow ing happens: Spontaneous P-signals are delivered from the atrium electrode 10 to the input of monostable flip flop 32 and start the 400 msec. refractory period defined by this monostable flip flop. Simultaneously monostable flip
3 flop 34 is triggered. After the 150 msec. delay period of monostable _ 10 --flip flop 34 the ventricle depolarization pulse is delivered through gate 38 and monostable flip flop 72 to the ventricle output stage 73 to 76.
When using the circuit parameters indicated for the dmbodiment of Figure 1 the atrium rate may vary between 70 and 150 beats/min. ~the latter correspond-ing to the 400 msec. refractory period of monostable flip flop 32). The ventricle is entrained at the interval of the delay period of monostable flip flop 34 (150 msec.). There is no atrium stimulation because monostable flip flop 56 is retriggered after each spontaneous atrium pulse so that at first 700 msec. must elapse, and because after depolari~ation of the ventricle monostable flip flop 56 is retriggered through the output of gate 30, monostable flip flop 42 and the input 45 of gate 46. Accordingly an atrium pulse could not be delivered before 850 msec. (corresponding to the sum of the delay periods of monostable flip flops 34 and 56) have elapsed.
However, the atrium stimulation does not take place because the atrium has spontaneously functioned already before this time.
Finally~ the case is considered that the atrium and the ventricle do not beat and therefore both must be stimulated (4th quadrant). ~trium stimulation now is effected in the manner outlined above. Because ~he ventri-~; cle pulse does not follow within the desired 150 msec. period and because the 300 msec. delay period of monostable flip flop 42 is not started through ventricle signal amplifier 20, gate 24 and monostable flip flop 26 retrograde suppression of the pulse transfer through gate 38 does not take place.
The pulse step occuring at the output of monostable flip flop 34 after the end of the 150 msec. period appears at the input 37 of gate 38 and is de-livered from the output of gate 38 through monostable flip flop 72 to output stage 73 to 76. The ventricle is depolarized through ventricle elec-trode 12.
In order to provide for a safe detection of the ventricle complex following an atrium pulse~ the 40 msec. monostable flip flop 78 is triggered by the atrium stimulating pulse appearing at output Q of monostable flip - - . . , ., ., , , ., ,:
: , S~7 flop 56. This causes the transfer of the pulses sensed within the ventricle to be disabled through the input 79 of gate 24 during the delay period of monostable flip flop 78. ~trium pulses received by the ventricle signal amplifier are prevented by this time slot from being effective in the ventricular circuit arrangement. -In the ventricular circuit arrangement the ventricle pulse is generated by quickly discharging the output capacitor 76 and slowly re-charging this capacitor through resistor 75, whereas the dynamically con-nected transistor 62 is provided for recharging the atrium output capacitor 70. Recharging is effected through this transistor at a very low resistance and thus is terminated quickly. This ensures that less distortions occur in the ~CG, that the atrium pulse may be easily distinguished in the ECG from the ventricle pulse and that upon the capacitor 70 being recharged the atrium signal amplifier has a substantially increased input impedance whereby P-sensing is further improved.
It is evident that output capacitor 76 likewise may be recharged through a transistor corresponding to transistor 62 in a low impedance manner.
However, in view of the fact that the ventricle signal amplifier 20 operates in a reliable manner without any specific precautions being required~ it normally will be preferable to provide for the described different design of the ou~-put stages to safely diffcrentiate in the ECG the atrium pulse from the ventricle pulse to thereby facilitate the postoperative malfunction ~ ;
diagnosis.
In practice it is desirable to likewise check the pacemaker functions in cases in which the patient's natural rhythm is proper and the pacemaker is fully suppressed. This e.g. may be done by disabling the input amplifiers 14 and 20 through a magnetic switch and by waiting until the stimulating pulses coincide with stimulatible atrium and ventricle phases. Then it can be determined whether the atrium pulse provokes a P-35~7 wave and whether the ventricle pulse provokes a QRS-complex. As an alter-native the PQ-delay period, which in the described embodiment amounts to 150 msec., may be drastically shortened to eOg. 50 msec. in order to bypass an intact conduction and to electrically stimulate the ventricle if the pacemaker is in proper conditionO Simultaneously the delay period of monostable flip flop 56 eOg. is shortened from 700 msecO to 450 msec. so that the sum of the delay periods of monostable flip flops 34 and 56 is 500 msec. corresponding to a frequency of 120 beats/min. In this manner the heart is certainly overridden; the stimulation may be properly checked.
A circuit arrangement which basically corresponds to the circuit arrangement of Figure 1 may be designed when using integrated circuits utilized for available demand pacemakers. Such an embodiment is illustrated in Figure 20 It comprises a pair of integrated circuits 84 and 860 Each of circuits 84, 86 includes a pulse generator having a timer adapted to be reset by spontaneous ventricle or atrium signals, respectively (correspond-ing to monostable flip flop 56) as ~ell as pulse shaping and output units (corresponding to monostable flip flops 60 and 62 as well as to output stages 63 to 70 or 73 to 76, respectively). The refractory members 32 and 42, respectively, the noise suppression members 15 and 26, respectively, as well as the amplifiers 14 and 20, respectively are combined into integrated ~ -circuits 88 and 90, respectively.
The integrated circuits 84 and 86 are series connected, a first outpu~ 91 tapped before the output unit of circuit 84 being connected through -~
a diode 92 and a capacitor 93 to the input of integra~ed~circuit 86. A
first output 95 of integrated circuit 86 ~hich corresponds to output 91 is connected through a line 96 and a diode 97 to an ON-input 98 o~ a storage member defined by a pair of mutually coupled NOR-gates 99,100, the output of this storage member being connected to the input of integrated circuit 84.
Input 98 functionally corresponds to the input of monostable flip flop 32 of Figure 1. At this junction an informtion is received whether a pacemaker pulse should stimulate the atrium or whe~her a spontaneous P-wave has occurred. Circuit 84 which is freely running at a frequency of 400 beats/minO corresponding to a pulse interval of 150 msec., is triggered through input 98 of storage member 99, loo, so that 150 msec. af~er the appearance of the P-information at the input 98 a stimula~ingpulse is transferred to the ventricle electrode 12 from the second output 103 of circuit 84 through a gate 104 and a conductor 105. The pacemaker thus operates as an atrium controlled ventricle pacemaker.
The circuit 86 which is freely running at a frequency correspond-ing to 700 msec. in the manner of a normal demand pacemaker, is reset through the first output 91 of integrated circuit 84. ~ccordingly 700 msec.
must elapse until an atrium pulse can be delivered to the atrium electrode 10 through the second output 107 of integrated circuit 86 and a conduit 108.
Simultaneously an output pulse is fed back from output 95 of circuit 86 to the input 98 of storage member 99,100 whereby the generator of circuit 84 is restarted and a period of 150 msec. is triggered.
; In view of the fact that a repetition rate corresponding to a 150 msec. pulse interval ~ould not make sense, the OFF input 112 of storage member 99~ loo is controlled from output 91 of circuit 84 through a diode 110 so that integrated circuit 84 is allowed to deliver each an individual pulse only. Therefore again an input signal at input 98 of storage member 99,100 is required to again trigger circuit 84 and to start the period of 150 msec.
The circuit arrangement of Figure 2 operates in the four bradycar- ~`
dia quadrants as follows:
~n the first quadrant - sufficient or fast atrium rate and quick response by spontaneous ventricle activities - the P-wave is received by the atrium electrode 10 and is supplied to the input 98 of storage member 99, loO through integrated circuit 88, a decoupling diode 114 and a capa-citor 115. The integrated circuit 84 is triggered and tends to deliver after 150 msecO through output 103 a pulse to the ventricle. However, because within this 150 msec. period integrated circuit 90 already has received through ventricle electrode 12 a spontaneous ventricle signal, a disabling signal is fed through a line 116 and a diode 117 to input 112 of storage member 99,100 and to one input of gate 104. The latter disables the transfer of the ventricle pulse from output 103 to ventricle electrode 1~. Atrium pulses likewise cannot be delivered because the received ven-tricular response is supplied through integrated circuit 90 and a diode 119 to the input of integrated circuit 86 thereby resetting this circuit for 700 msec. The signal which after 150 msec. leaves output 91 of integrated circuit 84 is used to retrigger through diode 92 the 700 msec. period which already had been triggered through a conduit 121 and a diode 122. Therefore an interval of 850 msec. must elapse before a further atrium stimulating sign-al can be delivered. However, this delivery does not take place because the P~wave is received at a higher rate. Therefore the pacemaker remains inactive.
In the second quadrant, i.e~ in case the atrium rate is too slow and the atrium requires stimulation, whereas conduction is effected in due time, a pulse is generated at the output 107 of integrated circuit 86~700 msecO a~ter a P-signal. This pulse is supplied to the atrium through line 108. The ventricle depolarization occurring in this quadrant in due time causes the stimulating pulse which, in the manner outlined above, appears after 150 msec. at the output 103 of integrated circuit 847 to be prevented from passing through gate 104. Because the delay period of 700 msec. is retriggered from output 91 the atrium again is depolarized after a total of 850 msec. Again a ventricle response occurs in due time~ which response~ through the output of integrated circuit 90 and gate 10~, hinders the ventricle pulse from being transferred from output 103 of integrated circuit 84 to the venkricle electrode 12~ -.. , : : . .
: - .- . : .. .
3S~7 In the case of sufficient or fast atrium activity and poor con-duction (3rd quadrant) the pacemaker acts as an atrium controlled ventri-cular pacemaker. A P-wave reaches through integrated circuit 88 the input 98 and switches ON the storage member 99,100. The integrated circuit 84 is triggered and, after 150 msecO, supplies a pulse to the ventricle through gate 104. This pulse can be transferred through gate 104 because there is no timely ventricle depolarization which would disable gate 104 through in-tegrated circuit 90.
In the case of atrium bradycardia and ventricle bradycardia ~4th quadrant) an atrium pulse is delivered from output 107 of integrated circuit 860 Simultaneously the storage member 99,100 is switched ON from output 95 t~rough line 96 and diode 97~ with the result that 150 msec. later a pu]se appears at output 103 o~ integrated circuit 84. This pulse is transmitted ,hrough gate 104 to ventricle electrode 12 because at this time no ventri-cular contraction has taken place which would disable gate 104 through integrated circuit 90.
Similar to the circuit arrangemen~, of Figure 1 a circuit unit 1~4 is provided which eOg. is comprised of RC-members and the function of which corresponds to the function of monostable flip flop 78. Circuit unit 1~4 inhibits the ventricle amplifier of integrated circuit 90 during an atrium pulse and a short time thereaEter~ e.g. a period of 20 msecO~ so that c~tri~lm pulses cannot be erroneously detected by the ventricle amplifierO
The atrium stimulation pulse output stage preferably may be design-ed in the manner outlined above in connection with Figure 1 so that the out-put capacitor is quickly recharged thereby facilitating the detection of the P-signals and increasing the input impedance of the P-amplifier.
- ~ .
When using the circuit parameters indicated for the dmbodiment of Figure 1 the atrium rate may vary between 70 and 150 beats/min. ~the latter correspond-ing to the 400 msec. refractory period of monostable flip flop 32). The ventricle is entrained at the interval of the delay period of monostable flip flop 34 (150 msec.). There is no atrium stimulation because monostable flip flop 56 is retriggered after each spontaneous atrium pulse so that at first 700 msec. must elapse, and because after depolari~ation of the ventricle monostable flip flop 56 is retriggered through the output of gate 30, monostable flip flop 42 and the input 45 of gate 46. Accordingly an atrium pulse could not be delivered before 850 msec. (corresponding to the sum of the delay periods of monostable flip flops 34 and 56) have elapsed.
However, the atrium stimulation does not take place because the atrium has spontaneously functioned already before this time.
Finally~ the case is considered that the atrium and the ventricle do not beat and therefore both must be stimulated (4th quadrant). ~trium stimulation now is effected in the manner outlined above. Because ~he ventri-~; cle pulse does not follow within the desired 150 msec. period and because the 300 msec. delay period of monostable flip flop 42 is not started through ventricle signal amplifier 20, gate 24 and monostable flip flop 26 retrograde suppression of the pulse transfer through gate 38 does not take place.
The pulse step occuring at the output of monostable flip flop 34 after the end of the 150 msec. period appears at the input 37 of gate 38 and is de-livered from the output of gate 38 through monostable flip flop 72 to output stage 73 to 76. The ventricle is depolarized through ventricle elec-trode 12.
In order to provide for a safe detection of the ventricle complex following an atrium pulse~ the 40 msec. monostable flip flop 78 is triggered by the atrium stimulating pulse appearing at output Q of monostable flip - - . . , ., ., , , ., ,:
: , S~7 flop 56. This causes the transfer of the pulses sensed within the ventricle to be disabled through the input 79 of gate 24 during the delay period of monostable flip flop 78. ~trium pulses received by the ventricle signal amplifier are prevented by this time slot from being effective in the ventricular circuit arrangement. -In the ventricular circuit arrangement the ventricle pulse is generated by quickly discharging the output capacitor 76 and slowly re-charging this capacitor through resistor 75, whereas the dynamically con-nected transistor 62 is provided for recharging the atrium output capacitor 70. Recharging is effected through this transistor at a very low resistance and thus is terminated quickly. This ensures that less distortions occur in the ~CG, that the atrium pulse may be easily distinguished in the ECG from the ventricle pulse and that upon the capacitor 70 being recharged the atrium signal amplifier has a substantially increased input impedance whereby P-sensing is further improved.
It is evident that output capacitor 76 likewise may be recharged through a transistor corresponding to transistor 62 in a low impedance manner.
However, in view of the fact that the ventricle signal amplifier 20 operates in a reliable manner without any specific precautions being required~ it normally will be preferable to provide for the described different design of the ou~-put stages to safely diffcrentiate in the ECG the atrium pulse from the ventricle pulse to thereby facilitate the postoperative malfunction ~ ;
diagnosis.
In practice it is desirable to likewise check the pacemaker functions in cases in which the patient's natural rhythm is proper and the pacemaker is fully suppressed. This e.g. may be done by disabling the input amplifiers 14 and 20 through a magnetic switch and by waiting until the stimulating pulses coincide with stimulatible atrium and ventricle phases. Then it can be determined whether the atrium pulse provokes a P-35~7 wave and whether the ventricle pulse provokes a QRS-complex. As an alter-native the PQ-delay period, which in the described embodiment amounts to 150 msec., may be drastically shortened to eOg. 50 msec. in order to bypass an intact conduction and to electrically stimulate the ventricle if the pacemaker is in proper conditionO Simultaneously the delay period of monostable flip flop 56 eOg. is shortened from 700 msecO to 450 msec. so that the sum of the delay periods of monostable flip flops 34 and 56 is 500 msec. corresponding to a frequency of 120 beats/min. In this manner the heart is certainly overridden; the stimulation may be properly checked.
A circuit arrangement which basically corresponds to the circuit arrangement of Figure 1 may be designed when using integrated circuits utilized for available demand pacemakers. Such an embodiment is illustrated in Figure 20 It comprises a pair of integrated circuits 84 and 860 Each of circuits 84, 86 includes a pulse generator having a timer adapted to be reset by spontaneous ventricle or atrium signals, respectively (correspond-ing to monostable flip flop 56) as ~ell as pulse shaping and output units (corresponding to monostable flip flops 60 and 62 as well as to output stages 63 to 70 or 73 to 76, respectively). The refractory members 32 and 42, respectively, the noise suppression members 15 and 26, respectively, as well as the amplifiers 14 and 20, respectively are combined into integrated ~ -circuits 88 and 90, respectively.
The integrated circuits 84 and 86 are series connected, a first outpu~ 91 tapped before the output unit of circuit 84 being connected through -~
a diode 92 and a capacitor 93 to the input of integra~ed~circuit 86. A
first output 95 of integrated circuit 86 ~hich corresponds to output 91 is connected through a line 96 and a diode 97 to an ON-input 98 o~ a storage member defined by a pair of mutually coupled NOR-gates 99,100, the output of this storage member being connected to the input of integrated circuit 84.
Input 98 functionally corresponds to the input of monostable flip flop 32 of Figure 1. At this junction an informtion is received whether a pacemaker pulse should stimulate the atrium or whe~her a spontaneous P-wave has occurred. Circuit 84 which is freely running at a frequency of 400 beats/minO corresponding to a pulse interval of 150 msec., is triggered through input 98 of storage member 99, loo, so that 150 msec. af~er the appearance of the P-information at the input 98 a stimula~ingpulse is transferred to the ventricle electrode 12 from the second output 103 of circuit 84 through a gate 104 and a conductor 105. The pacemaker thus operates as an atrium controlled ventricle pacemaker.
The circuit 86 which is freely running at a frequency correspond-ing to 700 msec. in the manner of a normal demand pacemaker, is reset through the first output 91 of integrated circuit 84. ~ccordingly 700 msec.
must elapse until an atrium pulse can be delivered to the atrium electrode 10 through the second output 107 of integrated circuit 86 and a conduit 108.
Simultaneously an output pulse is fed back from output 95 of circuit 86 to the input 98 of storage member 99,100 whereby the generator of circuit 84 is restarted and a period of 150 msec. is triggered.
; In view of the fact that a repetition rate corresponding to a 150 msec. pulse interval ~ould not make sense, the OFF input 112 of storage member 99~ loo is controlled from output 91 of circuit 84 through a diode 110 so that integrated circuit 84 is allowed to deliver each an individual pulse only. Therefore again an input signal at input 98 of storage member 99,100 is required to again trigger circuit 84 and to start the period of 150 msec.
The circuit arrangement of Figure 2 operates in the four bradycar- ~`
dia quadrants as follows:
~n the first quadrant - sufficient or fast atrium rate and quick response by spontaneous ventricle activities - the P-wave is received by the atrium electrode 10 and is supplied to the input 98 of storage member 99, loO through integrated circuit 88, a decoupling diode 114 and a capa-citor 115. The integrated circuit 84 is triggered and tends to deliver after 150 msecO through output 103 a pulse to the ventricle. However, because within this 150 msec. period integrated circuit 90 already has received through ventricle electrode 12 a spontaneous ventricle signal, a disabling signal is fed through a line 116 and a diode 117 to input 112 of storage member 99,100 and to one input of gate 104. The latter disables the transfer of the ventricle pulse from output 103 to ventricle electrode 1~. Atrium pulses likewise cannot be delivered because the received ven-tricular response is supplied through integrated circuit 90 and a diode 119 to the input of integrated circuit 86 thereby resetting this circuit for 700 msec. The signal which after 150 msec. leaves output 91 of integrated circuit 84 is used to retrigger through diode 92 the 700 msec. period which already had been triggered through a conduit 121 and a diode 122. Therefore an interval of 850 msec. must elapse before a further atrium stimulating sign-al can be delivered. However, this delivery does not take place because the P~wave is received at a higher rate. Therefore the pacemaker remains inactive.
In the second quadrant, i.e~ in case the atrium rate is too slow and the atrium requires stimulation, whereas conduction is effected in due time, a pulse is generated at the output 107 of integrated circuit 86~700 msecO a~ter a P-signal. This pulse is supplied to the atrium through line 108. The ventricle depolarization occurring in this quadrant in due time causes the stimulating pulse which, in the manner outlined above, appears after 150 msec. at the output 103 of integrated circuit 847 to be prevented from passing through gate 104. Because the delay period of 700 msec. is retriggered from output 91 the atrium again is depolarized after a total of 850 msec. Again a ventricle response occurs in due time~ which response~ through the output of integrated circuit 90 and gate 10~, hinders the ventricle pulse from being transferred from output 103 of integrated circuit 84 to the venkricle electrode 12~ -.. , : : . .
: - .- . : .. .
3S~7 In the case of sufficient or fast atrium activity and poor con-duction (3rd quadrant) the pacemaker acts as an atrium controlled ventri-cular pacemaker. A P-wave reaches through integrated circuit 88 the input 98 and switches ON the storage member 99,100. The integrated circuit 84 is triggered and, after 150 msecO, supplies a pulse to the ventricle through gate 104. This pulse can be transferred through gate 104 because there is no timely ventricle depolarization which would disable gate 104 through in-tegrated circuit 90.
In the case of atrium bradycardia and ventricle bradycardia ~4th quadrant) an atrium pulse is delivered from output 107 of integrated circuit 860 Simultaneously the storage member 99,100 is switched ON from output 95 t~rough line 96 and diode 97~ with the result that 150 msec. later a pu]se appears at output 103 o~ integrated circuit 84. This pulse is transmitted ,hrough gate 104 to ventricle electrode 12 because at this time no ventri-cular contraction has taken place which would disable gate 104 through integrated circuit 90.
Similar to the circuit arrangemen~, of Figure 1 a circuit unit 1~4 is provided which eOg. is comprised of RC-members and the function of which corresponds to the function of monostable flip flop 78. Circuit unit 1~4 inhibits the ventricle amplifier of integrated circuit 90 during an atrium pulse and a short time thereaEter~ e.g. a period of 20 msecO~ so that c~tri~lm pulses cannot be erroneously detected by the ventricle amplifierO
The atrium stimulation pulse output stage preferably may be design-ed in the manner outlined above in connection with Figure 1 so that the out-put capacitor is quickly recharged thereby facilitating the detection of the P-signals and increasing the input impedance of the P-amplifier.
- ~ .
Claims (21)
- THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
l. An electric heart pacemaker comprising circuit means for detecting and, if required, stimulating ventricular action, and circuit means for stimulating atrial action, characterized by circuit means for detecting atrial action and further circuit means for triggering ventricular stimulation unless a spontaneous ventricular action follows within a first predeter-mined time interval after either a detected spontaneous or a stimulated atrial action, as well as circuit means for trigger-ing an atrial action unless a spontaneous atrial action follows within a second predetermined time interval after either a detected spontaneous or a stimulated ventricular action. - 2. A pacemaker according to claim l, characterized in that the circuit means for triggering ventricular and atrial stimulation are interconnected so that the end of said first predetermined time interval triggers the beginning of said second predetermined time interval and that the end of said second predetermined time interval triggers the beginning of said first predetermined time interval.
- 3. A pacemaker according to claim l, characterized in that the circuit means for triggering ventricular stimulation and the circuit means for triggering atrial stimulation each include a monostable multivibrator which determines said first and said second predetermined time interval, respectively.
- 4. A pacemaker according to claim l, characterized in that said first predetermined time interval is between 120 msec.
and 200 msec. - 5. A pacemaker according to claim 1, characterized in that said second predetermined time interval is between 600 and 750 msec.
- 6. A pacemaker according to claim 1, characterized in that an associated unipolar electrode is provided for detecting and stimulating the atrial and the ventricular action, respect-ively, and that the pacemaker casing constitutes a common neutral electrode.
- 7. A pacemaker according to claim 1, characterized in that the circuit means for stimulating atrial action include an output capacitor adapted to be charged through first switch means and to be discharged through second switch means.
- 8. A pacemaker according to claim 7, characterized in that an atrial stimulation triggering signal is adapted to control both switch means and that the charging switch means are preceded by time delay means.
- 9. A pacemaker according to claim 1, 2 or 3 characterized in that the switch means for detecting ventricular action have associated thereto disabling means adapted to disable detection of ventricular action for a predetermined time period when an atrial stimulation is triggered.
- 10. A pacemaker according to claim 1, 2 or 3 characterized in that one of said first and second time intervals are adapted to be shortened for testing purposes.
- 11. A pacemaker according to claim 1, 2 or 3 characterized in that the circuit means for detecting atrial action and the circuit means for detecting ventricular action comprise refrac-tory means for blocking the detection of signals the frequency of which exceeds a predetermined maximum value.
- 12. A cardiac pacemaker pulse generator comprising: first terminal means adapted to being connected to the atrium of a heart; second terminal means adapted to being connected to the ventricle of said heart; first sensing means connected to said first terminal means for providing a signal whenever a signal indicative of an atrial contraction is applied to said first terminal; second sensing means connected to said second terminal for providing a signal whenever a signal indicative of a ventri-cular contraction is applied to said second terminal; and circuit means responsive to said first and second sensing means for providing pulse signals to said first and second terminal means in the absence of signals from said first and second sens-ing means within constant defined times, said circuit means including first and second defined time interval determining means, said first defined time interval being the time between the occurrence of an atrial contraction and the provision of a pulse to said second terminal means and said second defined time interval being the time between the occurrence of a ventri-cular contraction and the provision of a pulse to said first terminal means.
- 13. The invention according to claim 12 wherein said atrial contraction and ventricular contractions can be one of either stimulated or natural.
- 14. The invention according to claim 12 wherein said cir-cuit means includes means to disable said second sensing means for a portion of said first time interval whenever a pulse signal is provided to said first terminal.
- 15. The invention according to claim 12 wherein said cir-cuit means includes means to prevent the provision of pulse signals to either one of said first and second terminals in response to a sensing means signal from the sensing means connected to that one terminal.
- 16. A dual pace - dual sense cardiac pacemaker pulse generator comprising: a ventricular terminal adapted to being electrically coupled to the ventricle of the heart; an atrial terminal adapted to being electrically coupled to the atrium of the heart; ventricular sensing means for providing a signal in response to electric signals applied to said ventricular terminal which manifest natural ventricular contractions; atrial sensing means for providing a signal in response to electrical signals applied to said atrial terminal which manifest natural atrial contractions; ventricular pulse providing means for pro-viding ventricular stimulating pulses to said ventricular terminal; atrial pulse providing means for providing atrial stimulating pulses to said atrial terminal; and circuit inter-connect means for causing said ventricular pulse providing means to provide a ventricular stimulating pulse a first constant defined time after either a signal from said atrial sensing means or said atrial pulse providing means is provided unless a signal from said ventricular sensing means occurs prior in time, said circuit interconnect means further causing said atrial pulse providing means to provide an atrial stimulating pulse after the passage of a second constant defined time after either a ventricular signal was sensed or a ventricular stimulating pulse was applied to said ventricular terminal, unless a signal from said atrial sensing means occurs prior in time.
- 17. The invention according to claim 16 wherein said circuit means includes blanking means for inhibiting any response of said ventricular sensing means for a certain time, less than said first time, following the provision of a cardiac stimula-ting pulse to said atrial terminal.
- 18. The invention according to claim 16 wherein said circuit means includes atrial refractory means to inhibit the response to the atrial sensing means signal for a certain atrial refractory period following either the provision of a cardiac stimulating pulse to said atrial terminal or the provision of an atrial sens-ing means signal and further includes ventricular refractory means to inhibit the response to the ventricular sensing means signal for a certain ventricular refractory period following either the provision of a cardiac stimulating pulse to said ventri-cular terminal or the provision of a ventricular sensing means signal.
- 19. The invention according to claim 16 wherein said atrial pulse providing means includes capacitance means coupled to said atrial terminal and means to charge said capacitance means through a first switch and to discharge said capacitance means through a second switch.
- 20. The invention according to claim 19 wherein said first switch means includes delay means to delay the charging of said capacitance means until after the discharge of said capacitance means.
- 21. The invention according to claim 16: wherein said cir-cuit means includes means for inhibiting any response of said ventricular sensing means for a certain time, less than said first time, following the provision of a cardiac stimulation pulse to said atrial terminal; wherein said circuit means includes atrial refractory means to inhibit the response to the atrial sensing means signal for a certain atrial refractory period following either the provision of a cardiac stimulating pulse to said atrial terminal or the provision of an atrial sensing means signal and further includes ventricular refractory means to inhibit the response to the ventricular sensing means signal for a certain ventricular refractory period following either the provision of a cardiac stimulating pulse to said ventricular terminal or the provision of a ventricular sensing means signal; wherein said atrial pulse providing means includes capacitance means coupled to said atrial terminal and means to charge said capacitance means through a first switch and to discharge said capacitance means through a second switch;
and wherein said first switch means includes delay means to delay the charging of said capacitance means until after the discharge of said capacitance means.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DEP2701104.7 | 1977-01-12 | ||
| DE19772701104 DE2701104A1 (en) | 1977-01-12 | 1977-01-12 | PACEMAKER |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1098587A true CA1098587A (en) | 1981-03-31 |
Family
ID=5998555
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA294,718A Expired CA1098587A (en) | 1977-01-12 | 1978-01-11 | Atrial-ventricular synchronized pacemaker |
Country Status (8)
| Country | Link |
|---|---|
| JP (1) | JPS5389292A (en) |
| AU (1) | AU512855B2 (en) |
| CA (1) | CA1098587A (en) |
| DE (1) | DE2701104A1 (en) |
| FR (1) | FR2377190A1 (en) |
| GB (1) | GB1594902A (en) |
| NL (1) | NL177080C (en) |
| SE (1) | SE7800351L (en) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1979000070A1 (en) * | 1977-07-27 | 1979-02-22 | S Joseph | Heart stimulating apparatus |
| US4284082A (en) * | 1979-12-12 | 1981-08-18 | Medtronic B.V.Kerkrade | Ventricular synchronized atrial pacemaker and method of operation |
| AU547290B2 (en) * | 1980-04-07 | 1985-10-17 | Medtronic, Inc. | Artifact rejection by demand pacemakers |
| US4343311A (en) * | 1980-04-30 | 1982-08-10 | Medtronic, Inc. | Atrial refractory control for R-wave rejection in pacemakers |
| US4421116A (en) * | 1980-10-14 | 1983-12-20 | Medtronic, Inc. | Heart pacemaker with separate A-V intervals for atrial synchronous and atrial-ventricular sequential pacing modes |
| AU541479B2 (en) * | 1980-10-14 | 1985-01-10 | Medtronic, Inc. | Heart pacemeker with separate a-v intervals for a trial synchronous and atrial-ventricular sequential pacing modes |
| US4485818A (en) * | 1980-11-14 | 1984-12-04 | Cordis Corporation | Multi-mode microprocessor-based programmable cardiac pacer |
| US4401119A (en) * | 1981-02-17 | 1983-08-30 | Medtronic, Inc. | Prolongation of timing intervals in response to ectopic heart beats in atrial and ventricular pacemakers |
| DE3115124A1 (en) * | 1981-04-10 | 1982-11-04 | Biotronik Meß- und Therapiegeräte GmbH & Co Ingenieurbüro Berlin, 1000 Berlin | "HEART PACEMAKER" |
| WO1982003787A1 (en) * | 1981-05-04 | 1982-11-11 | Nettelhorst Herwig | Pacemaker |
| WO1982003781A1 (en) * | 1981-05-04 | 1982-11-11 | Nettelhorst Herwig | Pacemaker |
| EP0077808B1 (en) * | 1981-05-04 | 1987-08-26 | BIOTRONIK Mess- und Therapiegeräte GmbH & Co Ingenieurbüro Berlin | Pacemaker |
| EP0077800B1 (en) * | 1981-05-04 | 1987-11-11 | BIOTRONIK Mess- und Therapiegeräte GmbH & Co Ingenieurbüro Berlin | Pacemaker |
| EP0077801B1 (en) * | 1981-05-04 | 1987-09-23 | BIOTRONIK Mess- und Therapiegeräte GmbH & Co Ingenieurbüro Berlin | Pacemaker |
| DE3127597A1 (en) * | 1981-07-13 | 1983-02-17 | Siemens AG, 1000 Berlin und 8000 München | METHOD AND PACEMAKER FOR BIFOCAL STIMULATION OF THE HEART |
| US4378020A (en) * | 1981-08-20 | 1983-03-29 | Telectronics Pty. Ltd. | Dual chamber pacer |
| FR2544988B1 (en) * | 1983-04-29 | 1986-10-10 | Ela Medical Sa | AURICULO-VENTRICULAR CARDIAC STIMULATOR |
| US4624260A (en) * | 1985-05-07 | 1986-11-25 | Intermedics, Inc. | Pacemaker with conditional atrial tracking capability |
| DE3535568A1 (en) | 1985-10-04 | 1987-04-09 | Siemens Ag | Atrial controlled pacemaker |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3253596A (en) * | 1963-05-27 | 1966-05-31 | Cordis Corp | Cardiac pacer |
| US3595242A (en) * | 1969-03-26 | 1971-07-27 | American Optical Corp | Atrial and ventricular demand pacer |
| US3648707A (en) * | 1969-07-16 | 1972-03-14 | Medtronic Inc | Multimode cardiac paces with p-wave and r-wave sensing means |
| US3661158A (en) * | 1969-12-15 | 1972-05-09 | American Optical Corp | Atrio-ventricular demand pacer with atrial stimuli discrimination |
| US3747604A (en) * | 1969-12-15 | 1973-07-24 | American Optical Corp | Atrial and ventricular demand pacer with separate atrial and ventricular beat detectors |
| CA964334A (en) * | 1970-07-10 | 1975-03-11 | General Electric Company | Body organ stimulator |
| ZA727526B (en) * | 1971-12-06 | 1973-11-28 | American Optical Corp | Atrial and ventricular demand pacer |
| US3783878A (en) * | 1971-12-06 | 1974-01-08 | American Optical Corp | Atrial and ventricular pacer having independent rate and av delay controls |
| GB1424355A (en) * | 1972-03-11 | 1976-02-11 | Kent Cambridge Medical Ltd | Cardiac pacers |
| DE2342030A1 (en) * | 1973-08-20 | 1975-03-27 | Siemens Ag | ELECTRIC PACEMAKER |
-
1977
- 1977-01-12 DE DE19772701104 patent/DE2701104A1/en active Granted
-
1978
- 1978-01-11 CA CA294,718A patent/CA1098587A/en not_active Expired
- 1978-01-12 JP JP234278A patent/JPS5389292A/en active Granted
- 1978-01-12 GB GB1277/78A patent/GB1594902A/en not_active Expired
- 1978-01-12 AU AU32370/78A patent/AU512855B2/en not_active Expired
- 1978-01-12 FR FR7800780A patent/FR2377190A1/en active Granted
- 1978-01-12 SE SE7800351A patent/SE7800351L/en unknown
- 1978-06-26 NL NLAANVRAGE7806850,A patent/NL177080C/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| NL177080B (en) | 1985-03-01 |
| AU512855B2 (en) | 1980-10-30 |
| FR2377190A1 (en) | 1978-08-11 |
| GB1594902A (en) | 1981-08-05 |
| DE2701104A1 (en) | 1978-07-13 |
| SE7800351L (en) | 1978-07-13 |
| DE2701104C2 (en) | 1989-01-12 |
| AU3237078A (en) | 1979-07-19 |
| FR2377190B1 (en) | 1982-06-18 |
| JPS5389292A (en) | 1978-08-05 |
| NL177080C (en) | 1985-08-01 |
| NL7806850A (en) | 1979-12-28 |
| JPS5650591B2 (en) | 1981-11-30 |
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