CA1059240A - Lateral semiconductor device - Google Patents

Lateral semiconductor device

Info

Publication number
CA1059240A
CA1059240A CA255,479A CA255479A CA1059240A CA 1059240 A CA1059240 A CA 1059240A CA 255479 A CA255479 A CA 255479A CA 1059240 A CA1059240 A CA 1059240A
Authority
CA
Canada
Prior art keywords
layer
contact region
region
base
zone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA255,479A
Other languages
English (en)
French (fr)
Inventor
Pieter J.W. Jochems
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of CA1059240A publication Critical patent/CA1059240A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/63—Combinations of vertical and lateral BJTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0114—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including vertical BJTs and lateral BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
CA255,479A 1975-06-30 1976-06-23 Lateral semiconductor device Expired CA1059240A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7507733A NL7507733A (nl) 1975-06-30 1975-06-30 Halfgeleiderinrichting.

Publications (1)

Publication Number Publication Date
CA1059240A true CA1059240A (en) 1979-07-24

Family

ID=19824046

Family Applications (1)

Application Number Title Priority Date Filing Date
CA255,479A Expired CA1059240A (en) 1975-06-30 1976-06-23 Lateral semiconductor device

Country Status (6)

Country Link
JP (1) JPS526085A (enrdf_load_stackoverflow)
CA (1) CA1059240A (enrdf_load_stackoverflow)
DE (1) DE2627307C3 (enrdf_load_stackoverflow)
FR (1) FR2316741A1 (enrdf_load_stackoverflow)
GB (1) GB1542897A (enrdf_load_stackoverflow)
NL (1) NL7507733A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2454698A1 (fr) * 1979-04-20 1980-11-14 Radiotechnique Compelec Procede de realisation de circuits integres a l'aide d'un masque multicouche et dispositifs obtenus par ce procede
JPS57192608A (en) * 1981-05-21 1982-11-26 Hisashi Watanabe Supporter

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1811136A1 (de) * 1968-11-27 1970-11-05 Telefunken Patent Verfahren zum Herstellen eines Planartransistors
US3766446A (en) * 1969-11-20 1973-10-16 Kogyo Gijutsuin Integrated circuits comprising lateral transistors and process for fabrication thereof
US3873989A (en) * 1973-05-07 1975-03-25 Fairchild Camera Instr Co Double-diffused, lateral transistor structure
US3829709A (en) * 1973-08-31 1974-08-13 Micro Components Corp Supply reversal protecton circuit

Also Published As

Publication number Publication date
FR2316741B1 (enrdf_load_stackoverflow) 1982-04-16
DE2627307B2 (de) 1981-07-02
DE2627307C3 (de) 1982-03-11
JPS526085A (en) 1977-01-18
NL7507733A (nl) 1977-01-03
DE2627307A1 (de) 1977-01-20
JPS5634104B2 (enrdf_load_stackoverflow) 1981-08-07
GB1542897A (en) 1979-03-28
FR2316741A1 (fr) 1977-01-28

Similar Documents

Publication Publication Date Title
US4546536A (en) Fabrication methods for high performance lateral bipolar transistors
US4521952A (en) Method of making integrated circuits using metal silicide contacts
US4504332A (en) Method of making a bipolar transistor
US4583106A (en) Fabrication methods for high performance lateral bipolar transistors
US4066473A (en) Method of fabricating high-gain transistors
CA1243421A (en) Shallow junction complementary vertical bipolar transistor pair
JPH06318707A (ja) 電力用集積回路及びその製造方法
US4392149A (en) Bipolar transistor
CA1142266A (en) Self-aligned micrometer bipolar transistor device and process
JPH0420265B2 (enrdf_load_stackoverflow)
US6262472B1 (en) Bipolar transistor compatible with CMOS utilizing tilted ion implanted base
EP0078725B1 (en) Method for forming submicron bipolar transistors without epitaxial growth and the resulting structure
US4717678A (en) Method of forming self-aligned P contact
EP0233202B1 (en) Fabricating a semiconductor device with buried oxide
US6043130A (en) Process for forming bipolar transistor compatible with CMOS utilizing tilted ion implanted base
US20030107051A1 (en) Super self -aligned heterojunction biplar transistor and its manufacturing method
EP0078571B1 (en) Semiconductor device and method of manufacturing the same
US4691436A (en) Method for fabricating a bipolar semiconductor device by undercutting and local oxidation
CA1059240A (en) Lateral semiconductor device
JPH065706B2 (ja) ＢｉＣＭＯＳ素子の製造方法
US4127864A (en) Semiconductor device
US4058825A (en) Complementary transistor structure having two epitaxial layers and method of manufacturing same
KR960006109B1 (ko) 폴리실리콘 스트링어 베이스 접촉부를 지니는 쌍극 트랜지스터
JP2532384B2 (ja) バイポ−ラ・トランジスタとその製法
JP3373995B2 (ja) 高周波半導体装置とその製造方法