BE631780A - - Google Patents
Info
- Publication number
- BE631780A BE631780A BE631780DA BE631780A BE 631780 A BE631780 A BE 631780A BE 631780D A BE631780D A BE 631780DA BE 631780 A BE631780 A BE 631780A
- Authority
- BE
- Belgium
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
- H03K19/162—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices using parametrons
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US196028A US3296424A (en) | 1962-05-09 | 1962-05-09 | General purpose majority-decision logic arrays |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BE631780A true BE631780A (US20110009641A1-20110113-C00256.png) |
Family
ID=22723844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BE631780D BE631780A (US20110009641A1-20110113-C00256.png) | 1962-05-09 |
Country Status (6)
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3439328A (en) * | 1964-08-19 | 1969-04-15 | Rca Corp | Parity circuits employing threshold gates |
| US3423577A (en) * | 1965-12-28 | 1969-01-21 | Sperry Rand Corp | Full adder stage utilizing dual-threshold logic |
| US3519810A (en) * | 1967-02-14 | 1970-07-07 | Motorola Inc | Logic element (full adder) using transistor tree-like configuration |
| SE300065B (US20110009641A1-20110113-C00256.png) * | 1967-09-08 | 1968-04-01 | Ericsson Telefon Ab L M | |
| US3855536A (en) * | 1972-04-04 | 1974-12-17 | Westinghouse Electric Corp | Universal programmable logic function |
| US4551815A (en) * | 1983-12-12 | 1985-11-05 | Aerojet-General Corporation | Functionally redundant logic network architectures with logic selection means |
| US4551814A (en) * | 1983-12-12 | 1985-11-05 | Aerojet-General Corporation | Functionally redundant logic network architectures |
| GB2171231B (en) * | 1985-02-14 | 1989-11-01 | Intel Corp | Software programmable logic array |
| US5023775A (en) * | 1985-02-14 | 1991-06-11 | Intel Corporation | Software programmable logic array utilizing "and" and "or" gates |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2999637A (en) * | 1959-04-29 | 1961-09-12 | Hughes Aircraft Co | Transistor majority logic adder |
| US3201574A (en) * | 1960-10-07 | 1965-08-17 | Rca Corp | Flexible logic circuit |
-
0
- NL NL292437D patent/NL292437A/xx unknown
- BE BE631780D patent/BE631780A/xx unknown
-
1962
- 1962-05-09 US US196028A patent/US3296424A/en not_active Expired - Lifetime
-
1963
- 1963-04-30 GB GB17001/63A patent/GB958884A/en not_active Expired
- 1963-05-03 CH CH564563A patent/CH411993A/de unknown
- 1963-05-03 FR FR933593A patent/FR1361607A/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| CH411993A (de) | 1966-04-30 |
| US3296424A (en) | 1967-01-03 |
| GB958884A (en) | 1964-05-27 |
| FR1361607A (fr) | 1964-05-22 |
| NL292437A (US20110009641A1-20110113-C00256.png) |
