AU6169398A - Media access control micro-risc stream processor and method for implementing thesame - Google Patents

Media access control micro-risc stream processor and method for implementing thesame

Info

Publication number
AU6169398A
AU6169398A AU61693/98A AU6169398A AU6169398A AU 6169398 A AU6169398 A AU 6169398A AU 61693/98 A AU61693/98 A AU 61693/98A AU 6169398 A AU6169398 A AU 6169398A AU 6169398 A AU6169398 A AU 6169398A
Authority
AU
Australia
Prior art keywords
thesame
implementing
access control
media access
stream processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU61693/98A
Inventor
William H. Bares
Alak K. Deb
Namakkal S. Sambamurthy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xaqti Corp
Original Assignee
Xaqti Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/968,551 external-priority patent/US6172990B1/en
Application filed by Xaqti Corp filed Critical Xaqti Corp
Publication of AU6169398A publication Critical patent/AU6169398A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/6215—Individual queue per QOS, rate or priority
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9057—Arrangements for supporting packet reassembly or resequencing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9084—Reactions to storage capacity overflow
    • H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
    • H04L49/9094—Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/12—Protocol engines
AU61693/98A 1997-02-11 1998-02-11 Media access control micro-risc stream processor and method for implementing thesame Abandoned AU6169398A (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US3758897P 1997-02-11 1997-02-11
US60037588 1997-02-11
US5021097P 1997-06-19 1997-06-19
US60050210 1997-06-19
US08/968,551 US6172990B1 (en) 1997-06-19 1997-11-12 Media access control micro-RISC stream processor and method for implementing the same
US08968551 1997-11-12
PCT/US1998/003010 WO1998035480A1 (en) 1997-02-11 1998-02-11 Media access control micro-risc stream processor and method for implementing the same

Publications (1)

Publication Number Publication Date
AU6169398A true AU6169398A (en) 1998-08-26

Family

ID=27365237

Family Applications (1)

Application Number Title Priority Date Filing Date
AU61693/98A Abandoned AU6169398A (en) 1997-02-11 1998-02-11 Media access control micro-risc stream processor and method for implementing thesame

Country Status (4)

Country Link
EP (1) EP0960517A1 (en)
AU (1) AU6169398A (en)
TW (1) TW495671B (en)
WO (1) WO1998035480A1 (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6389479B1 (en) * 1997-10-14 2002-05-14 Alacritech, Inc. Intelligent network interface device and system for accelerated communication
US6766381B1 (en) * 1999-08-27 2004-07-20 International Business Machines Corporation VLSI network processor and methods
US7197491B1 (en) 1999-09-21 2007-03-27 International Business Machines Corporation Architecture and implementation of a dynamic RMI server configuration hierarchy to support federated search and update across heterogeneous datastores
US7113939B2 (en) 1999-09-21 2006-09-26 International Business Machines Corporation Architecture to enable search gateways as part of federated search
US6792416B2 (en) 1999-09-21 2004-09-14 International Business Machines Corporation Managing results of federated searches across heterogeneous datastores with a federated result set cursor object
US6466933B1 (en) 1999-09-21 2002-10-15 International Business Machines Corporation Delayed delivery of query results or other data from a federated server to a federated client until such information is needed
US6700897B1 (en) * 1999-10-29 2004-03-02 Advanced Micro Devices, Inc. Apparatus and method for identifying data packet types in real time on a network switch port
US6693906B1 (en) 2000-07-17 2004-02-17 Advanced Micro Devices, Inc. Apparatus and method for buffer-free evaluation of packet data bytes with multiple min terms
US6963565B1 (en) * 2000-08-14 2005-11-08 Advanced Micro Devices, Inc. Apparatus and method for identifying data packet at wire rate on a network switch port
US7039717B2 (en) 2000-11-10 2006-05-02 Nvidia Corporation Internet modem streaming socket method
US6876657B1 (en) 2000-12-14 2005-04-05 Chiaro Networks, Ltd. System and method for router packet control and ordering
US20020191621A1 (en) * 2001-06-14 2002-12-19 Cypress Semiconductor Corp. Programmable protocol processing engine for network packet devices
US20030037154A1 (en) * 2001-08-16 2003-02-20 Poggio Andrew A. Protocol processor
US8176545B1 (en) 2003-12-19 2012-05-08 Nvidia Corporation Integrated policy checking system and method
CN114466072B (en) * 2020-11-10 2024-04-02 深圳Tcl新技术有限公司 Data processing method, intelligent terminal and computer readable storage medium
TWI825923B (en) * 2022-08-16 2023-12-11 皓德盛科技有限公司 Field programmable logic gate array for financial transactions

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5201056A (en) * 1990-05-02 1993-04-06 Motorola, Inc. RISC microprocessor architecture with multi-bit tag extended instructions for selectively attaching tag from either instruction or input data to arithmetic operation output
US5630059A (en) * 1995-02-06 1997-05-13 International Business Machines Corporation Expedited message transfer in a multi-nodal data processing system

Also Published As

Publication number Publication date
EP0960517A1 (en) 1999-12-01
WO1998035480A1 (en) 1998-08-13
TW495671B (en) 2002-07-21

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