AU2018248439C1 - General-purpose parallel computing architecture - Google Patents

General-purpose parallel computing architecture Download PDF

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Publication number
AU2018248439C1
AU2018248439C1 AU2018248439A AU2018248439A AU2018248439C1 AU 2018248439 C1 AU2018248439 C1 AU 2018248439C1 AU 2018248439 A AU2018248439 A AU 2018248439A AU 2018248439 A AU2018248439 A AU 2018248439A AU 2018248439 C1 AU2018248439 C1 AU 2018248439C1
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Australia
Prior art keywords
coprocessors
computing
cores
core
soma
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Active
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AU2018248439A
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English (en)
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AU2018248439A1 (en
AU2018248439B2 (en
Inventor
Paul BURCHARD
Ulrich Drepper
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Goldman Sachs and Co LLC
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Goldman Sachs and Co LLC
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Publication date
Priority claimed from US15/481,201 external-priority patent/US11449452B2/en
Application filed by Goldman Sachs and Co LLC filed Critical Goldman Sachs and Co LLC
Publication of AU2018248439A1 publication Critical patent/AU2018248439A1/en
Application granted granted Critical
Publication of AU2018248439B2 publication Critical patent/AU2018248439B2/en
Priority to AU2021203926A priority Critical patent/AU2021203926B2/en
Publication of AU2018248439C1 publication Critical patent/AU2018248439C1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5072—Grid computing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00—Machine learning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/044—Recurrent networks, e.g. Hopfield networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/047—Probabilistic or stochastic networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/084—Backpropagation, e.g. using gradient descent
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/088—Non-supervised learning, e.g. competitive learning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N7/00—Computing arrangements based on specific mathematical models
    • G06N7/01—Probabilistic graphical models, e.g. probabilistic networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/082—Learning methods modifying the architecture, e.g. adding, deleting or silencing nodes or connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Artificial Intelligence (AREA)
  • Biophysics (AREA)
  • Biomedical Technology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computational Linguistics (AREA)
  • Computer Hardware Design (AREA)
  • Probability & Statistics with Applications (AREA)
  • Neurology (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Algebra (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Medical Informatics (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Complex Calculations (AREA)
  • Logic Circuits (AREA)
AU2018248439A 2017-04-06 2018-04-04 General-purpose parallel computing architecture Active AU2018248439C1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2021203926A AU2021203926B2 (en) 2017-04-06 2021-06-14 General-purpose parallel computing architecture

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/481,201 US11449452B2 (en) 2015-05-21 2017-04-06 General-purpose parallel computing architecture
US15/481,201 2017-04-06
PCT/US2018/026108 WO2018187487A1 (fr) 2017-04-06 2018-04-04 Architecture informatique parallèle polyvalente

Related Child Applications (1)

Application Number Title Priority Date Filing Date
AU2021203926A Division AU2021203926B2 (en) 2017-04-06 2021-06-14 General-purpose parallel computing architecture

Publications (3)

Publication Number Publication Date
AU2018248439A1 AU2018248439A1 (en) 2019-10-17
AU2018248439B2 AU2018248439B2 (en) 2021-06-03
AU2018248439C1 true AU2018248439C1 (en) 2021-09-30

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AU2018248439A Active AU2018248439C1 (en) 2017-04-06 2018-04-04 General-purpose parallel computing architecture
AU2021203926A Active AU2021203926B2 (en) 2017-04-06 2021-06-14 General-purpose parallel computing architecture

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AU2021203926A Active AU2021203926B2 (en) 2017-04-06 2021-06-14 General-purpose parallel computing architecture

Country Status (6)

Country Link
EP (1) EP3607454A4 (fr)
JP (2) JP7173985B2 (fr)
CN (1) CN110720095A (fr)
AU (2) AU2018248439C1 (fr)
CA (1) CA3059105A1 (fr)
WO (1) WO2018187487A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112068942B (zh) * 2020-09-07 2023-04-07 北京航空航天大学 一种基于单节点模拟的大规模并行系统模拟方法
CN114356541B (zh) * 2021-11-29 2024-01-09 苏州浪潮智能科技有限公司 一种计算核心的配置方法及装置、系统、电子设备

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160342568A1 (en) * 2015-05-21 2016-11-24 Goldman, Sachs & Co. General-purpose parallel computing architecture

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US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
JPH0535867A (ja) * 1990-09-06 1993-02-12 Matsushita Electric Ind Co Ltd 画像処理装置
JPH05242065A (ja) * 1992-02-28 1993-09-21 Hitachi Ltd 情報処理装置及びシステム
JP2561028B2 (ja) * 1994-05-26 1996-12-04 日本電気株式会社 サイドローブキャンセラ
US6829697B1 (en) * 2000-09-06 2004-12-07 International Business Machines Corporation Multiple logical interfaces to a shared coprocessor resource
TWI234737B (en) * 2001-05-24 2005-06-21 Ip Flex Inc Integrated circuit device
US8756264B2 (en) * 2006-06-20 2014-06-17 Google Inc. Parallel pseudorandom number generation
EP2304577B1 (fr) * 2008-05-27 2018-07-04 Stillwater Supercomputing, Inc. Moteur d'exécution
WO2011135759A1 (fr) * 2010-04-30 2011-11-03 日本電気株式会社 Dispositif de traitement d'informations et procédé de commutation de tâches
US8949577B2 (en) * 2010-05-28 2015-02-03 International Business Machines Corporation Performing a deterministic reduction operation in a parallel computer
US20150261535A1 (en) * 2014-03-11 2015-09-17 Cavium, Inc. Method and apparatus for low latency exchange of data between a processor and coprocessor
CN106414219B (zh) * 2014-05-30 2018-10-12 三菱电机株式会社 转向控制装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160342568A1 (en) * 2015-05-21 2016-11-24 Goldman, Sachs & Co. General-purpose parallel computing architecture

Also Published As

Publication number Publication date
AU2018248439A1 (en) 2019-10-17
JP2020517000A (ja) 2020-06-11
CN110720095A (zh) 2020-01-21
EP3607454A4 (fr) 2021-03-31
EP3607454A1 (fr) 2020-02-12
CA3059105A1 (fr) 2018-10-11
JP2023015205A (ja) 2023-01-31
AU2018248439B2 (en) 2021-06-03
AU2021203926B2 (en) 2022-10-13
JP7173985B2 (ja) 2022-11-17
WO2018187487A1 (fr) 2018-10-11
AU2021203926A1 (en) 2021-07-08

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DA2 Applications for amendment section 104

Free format text: THE NATURE OF THE AMENDMENT IS AS SHOWN IN THE STATEMENT(S) FILED 09 JUN 2021

DA3 Amendments made section 104

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FGA Letters patent sealed or granted (standard patent)