AU2014403782B2 - DALI device addressing method and software - Google Patents

DALI device addressing method and software Download PDF

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Publication number
AU2014403782B2
AU2014403782B2 AU2014403782A AU2014403782A AU2014403782B2 AU 2014403782 B2 AU2014403782 B2 AU 2014403782B2 AU 2014403782 A AU2014403782 A AU 2014403782A AU 2014403782 A AU2014403782 A AU 2014403782A AU 2014403782 B2 AU2014403782 B2 AU 2014403782B2
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devices
address
dali
device
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AU2014403782A1 (en
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Michael Howes
Nicholas MOORES
Lance Stewart
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INT'ACT Pty Ltd
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Intact Pty Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/64Hybrid switching systems
    • H04L12/6418Hybrid transport
    • H05B47/18
    • H05B47/19

Abstract

The invention provides an improved method of addressing DALI devices through algorithms implemented on DALI control devices and electronic devices running operating systems such as Windows, Windows Mobile, i0S, OSX, Linux, UNIX, and Android. The algorithms reduce the time needed to address DALI devices on a DALI line by performing the following functions: visually indicating the devices remaining to be addressed by flashing such devices; visually indicating a smaller set of devices to be addressed by continuously flashing three or more such devices that have not yet been addressed; detection of new DALI devices that have been added to the line; assigning a user defined range of logical short addresses to DALI devices; and visually indicating a device selected to be addressed by continuously flashing such device.

Description

WO 2016/023061 PCT/AU2014/050178 1 PALI Device Addressing Method & Software 1.0 Ffetd of the Invcnffon

The present invention relates to addressing of Digital Addressable Lighting interface (DALI} devices, in a particular form, the present invention relates to a method as well as supporting firmware and 5 software for use in addressing devices on a DALI line. 2.0 Background of the Invention DAU is a lighting protocol that allows for the monitoring and control of specific devices which might, for example, comprise a lighting system. Such devices include such things as light emitting diodes (LEDs), emergency lights, sensors, ballasts for luminaires, fans and blinds. In addition to controlling 10 these devices individually, DALI allows for these devices to he grouped, end controlled by broadcast, individual address and or by group with groups normally assigned by address, thus generally requiring an address in order to add devices to groups. Pursuant to toe open standard defined in the DAU Standard published as IEC 62386, a limit of sixty-four DAU compliant devices may be supported by a single DAU data bus, A DALI interface comprises a two wire data bus with electrical characteristics· and 15 this data bus.is referred to as a line or an interface. A DAU line is powered by a DAU power supply with DC voltage between llSVDC and 22.5VPC at idle high; DAU communication between devices and controllers is achieved by shorting this powered line using Manchester encoding and such shorting is limited pursuant to the PALI standard to a maximum of two hundred and fifty miiltamps.

2D

2S DAU compliant devices generate a twenty-four bit pseudo-random address upon instruction by a randomise command. Although ail DAU devices on a DAU line will concurrently acton DAU broadcast commands without commissioning. If specific DAU devices need to be controlled and/or monitored, they must be given a six bit Short Address, The DAU Standard allows for two forms of Short Addressing with one form assigning a "Random" Short Address and the other assigning a specific short address by a method known as Physical Addressing, A "Random" Short Address is a unique six bit number, between tero and sixty-three, that Is allocated to DAU devices by transmitting the appropriate short address commands to the DALI devices as set out in the DAU standard. This number is randomly allocated In the sense that the DAU devices will likely be addressed in an illogical or random order. For instance, if a rpw of ten DAU devices were installed, it will typically be the case that they should be addressed sequentially and that these addresses will usually be shown on a fighting plan and such an

3D ordered and/or planned set of addresses is referred to as logical" addresses in order to distinguish them from "random' addresses. However, with short addressing, the allocation of the short address SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 2 will always be based upon its random Song address, thus making the short address also effectively random, tor example one of the devices may be assigned address ten, whilst the accent lights to either side of the device which have been assigned address ten are themselves addressed as sixty and four respectively, whereas the addresses for lights adjacent to address ten might logically need to be nine and eleven. Therefore,; Use installer will then have to remap the random address of each DALI device such as sixty, four and ten in the example, in order to give them their logical address, The alternative method to the pseudo-random address method is known as physical addressing and it is less common than random short addressing as it Is generally more time consuming for an installer. As the term physical addressing suggests, such s method requires an installer to physically access each device Individually In order for it to be logically addressed.

Both random short addressing and physical addressing may be executed using a suitable DALI commissioning tool, such as the patent applicant's 'ADDICT' device. This patent addresses a novel method of addressing DAU devices. 3,0 Summary

The current methods of addressing DALI devices are flawed in that they are more time consuming and are thus more expensive to achieve than this claimed invention and this invention requires only a logic control deviceand a DAU Control Device both with the invention installed and interconnected by an Intranet whereas other methods require additional intermediary devices and/or steps.

Physical addressing is time consuming for installers as it requires physical access to each of the DAU devices that are to be addressed in order to provide them their unique six bit address enumerated in a range between zero and sixty-three. One such method of physically addressing devices is to connect a purpose built commissioning tool to the device either directly or by connection to the DAO line on which the devices are Interconnected and then Mowing prompts to remove a load that is normally a lamp from the load side of the device and then when prompted to do so restore the load. This method would then have to be repeated up to sixty-four times for a single DAU line, multiplied by the number of DAU lines that are required to be commissioned for a project, which may he any number of DAU lines, making It more time-consuming than alternative methods.

Remapping random short addresses In a manner that does not use physical addressing is the more widely practiced method of addressing as it is less time consuming than physical addressing methods; this method that is commonly used to achieve iogfcal addressing may use purpose built commissioning tools or DAU control devices to remap addresses, however this will typically require more than one individual to be working on addressing the devices in order to determine the location of the device to SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 3 fee remapped to a logical address, or ft may be achieved with a single person hut to do so wiii require the use of expensive and cumbersome methods comprising purpose built commissioning took that interface with a DALI controller through intermediary devices such as radio modems and in such a case that one person wiii usually need to constantly refer to the lighting plan and to the DALI devices 5 to determined which DAU device, usually a luminaire, has which random address and requires which logical address.

Figure 1 shows an example of remapping addresses from random short addresses to their logical addresses that require mors than one installer: one installer 109 must physically walk to each device and communicate with the second installer 102 when the device 110 to be remapped visually or 10 otherwise indicates that it has been selected by the second installer. The second installer Is positioned at a location remote from the first Installer, typically at a switchboard or anywhere that the DAL! line Is accessible which position may well not be in line of sight of the DAU devices 106 -110, and this second installer will be communicating with the DAU devices by means of a suitable commissioning tpol or DAU control device for the purpose of selecting sequentially the random short addresses of 15 DALI devices on the line. This second installer will typically select the target DALI device to be remapped to a more logical address by means of sequentially stepping through the short addresses which causes each DAU device to visually or otherwise indicate themselves by means of an ‘'Identify' command or by means of illuminating only, or more brightly, the selected device address, until the device targeted by the first installer is found at which time the first installer will iypicaiiy communicate 2D with the second installer to advise that the targeted device has indeed been found, so that the second installer .may then remap the device to its logical address.

When considered from an economic perspective, the current methods of addressing are costly in that they require more man-hours when directly compared to the more efficient approach of the claimed invention. 25 4,0 Brief Statement of the invention

The invention in various embodiments provides one or more of the following benefits: faster addressing times, visual indication of addresses that remain to be addressed, visual indication of device selected to be addressed, visual indication of successful addressing, ability to assign specific ranges of logical short addresses, ability to defect and address new devices. These benefits are 30 achieved by implementing novel software programs onto a Logie Computing Device, and novel firmware onto a DAU Control Device; the DAU Control Device being a device that is capable of cammunteating and receiving DAU signals in combination with either an integral or external DALI SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 4 power supply; the Logic Computing Device being any form of computing device running operating systems suds as Android, sOS, OS, Linux, UNIX, Windows Mobile or Windows; the Logic Computing Device and the DALI Contra! Device communicating via a standard intranet such as a WLAN or hard wired methods such as Ethernet,

In essence, the invention is a combination of methods of assigning DAL.) addresses to DAU devices, using DAU Control Devices, as well as consumer computing devices such as smart phones, tablets,, personal computers and laptops, instead of previously existing commissioning tools and software. Using the invention instead of such commissioning tools and software will help make a commissioning process mors user friendly and less expensive. The invention will allow for addressing commands to be sent from either a DAU Control Device, or from devices such as smart phones, tablets, personal computers end laptops vis a DAU Control Device. A typical sequence of functions to be carried out as part of the invention is given below, it must be noted, as will become evident, that this sequence of steps need not be adhered to. This sequence of steps is given purely for illustrative purposes. As is used hereinafter, to ''flash", or “flashing" will refer generally to a DAU device, typically a light source such as a luminaire, preferably changing from a bright state to a dim state one or more times, although it is understood that alternative methods of indication such as audible signals, or substituting an off state for a dim state, may also be used.

The Logic Computing Device may execute the software and in doing so could generate a GUI for the user, The SUI may provide5 the user with an option to start the process of addressing or remapping of DAU devices art the DAU line. The Logic Computing Device may communicate the user's actions to the DAU Control Device over an intranet. The DAU Control Device may communicate the user's actions to the DAU devices. The DAU Control Device may instruct each device that exists within a DALI network to 'flash' or otherwise indicate their selection in the order of their current short address, The software contained on the Logic Computing Device may provide the user the option to confirm that the next DAU device that they wish to remap to a logical address has been flashed. The firmware contained on the DALI -Control Device may receive such a command from the user's Logic Computing Device, and communicate this to the DAU device by means of DAU commands that allow short addresses to be remapped being communicated to the DALI device, thus successfully assigning a logical short address to the DALI device, A further aid for understanding how the various embodiments interoperate to achieve the desired, useful results is given in Figure 2. It must be noted that this is on example of one known method of achieving the desired, useful results, but is not assumed to be the only method. A logic Computing Device will send a command to the DALI Control Device to start either the outer loop, or inner loop. SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 5

Outer loop' and "inner loop' are described In depth in the detailed description of the invention, if the outer loop command is sent, the program will determine whether the program has been before since the program was executed, if it is the first time running the program, ah devices will be counted. The DALS Control Device will then determine whether the user is attempting to assign an address. If the user is assigning an address, the address will be remapped and the variables updated, if not., the DALI Control Device will determine whether there are Fewer than five devices remaining on the DALI line, if there are fewer than five DAL! devices remaining on the DALi line, the inner loop will be executed. If there are five or more DALI devices remaining on the DAU line., the outer loop will he run and the DALI Control Device will reply to the Logic Computing Device that the outer loop is being run and the process will restart, if the user, instead of sending an outer loop command, sends an inner loop command, the inner loop will be run, the DAL! Centro! Device will reply to the Logic Computing Device that the inner loop is being run and the process will restart, if the Logic Computing Device sends a confirm command, the confirm loop, described in depth in the detailed description of the invention,, will run.

Further features of the invention., and the advantages offered thereby, are subsequently explained in greater detail hereinafter, with reference being made to specific embodiments illustrated in accompanying drawings. SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 6 5.0 Detailed Description ihe present invention wiii now be described in more detail with reference to exemplary embodiments as shown in the accompanying drawings. White the present invention is described herein with reference to the exemplary embodiments, it should be understood that the present invention is not limited to such exemplary embodiments. Those possessing ordinary skill in the art and having access to the teachings herein wiii recognize additional implementations., modifications, and embodiments, as well as other applications for use of the invention, which are fully contemplated herein as within the scope of the present, invention as disclosed and claimed herein, and with respect to which the present invention could be of significant utility. Where useful, variations on the embodiments are proposed, but this is not to be taken as a limitation on the possible number of venations of such embodiments. Rather, such variations are given as a useful aid for the reader.

With reference to Figure 3, an exemplary set of components typical to a DAL! commissioning process using the invention is illustrated generally as including a smartphone and/or tablet computing device with the invention Installed 300 A, a wireless network 302 B, DALI Control Device with the invention installed 304 €., and DAU devices, such as Sights 306 D< in a preferred embodiment, the invention would include an algorithmically implemented method for displaying the devices on a DAU line that are yet to be assigned a logical short address. This method is illustrated in Figure 4, and is referred to as the 'outer loop'. "Outer loop" refers to the process of flashing all DAU devices that remain to be assigned a logical short address that may be found on a DAU line in tbs sequential order of their random address or previously assigned address. As is illustrated In Figure 4, a device 400 with the lowest remaining short address (whether that short address is random or logical} will be flashed for a period of five hundred milliseconds, before the next device 302 Is fleshed. All remaining devices 404 -- 412 will be flashed until the user 414 signifies that the device that they wish to address has just recently been flashed by pressing a button generated in the graphics} user interface (SU!) on the Logic Computing Device 416. if the user does not press the generated button, the outer loop will repeat until such time .as the user Interrupts the process. This method is advantageous as it provides a visual indicator as to which DAI! devices are yet to receive their short address. 1 he size of the outer loop wiii always reduce by the number of devices assigned a logical short address. For example, if there are fifty-six devices on a Sine, then the first time the algorithm is run in the addressing session, the outer loop wiii run through all fifty-six devices·. When the user assigns a short address to a device, then there wf.II be fifty five remaining devices that are flashed as part of the outer loop. This is advantageous as it allows the addressing process to SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 7 continuously become faster as the numerical she of the set of DAL! devices in the outer loop reduces. An addressing session is started each time the program is executed. The algorithm is not concerned whether the user has used the claimed methods for addressing devices at a prior point in time. Bather., the algorithm is concerned whether the user has addressed devices since the last time the program 5 was executed.

Of course, it is recognised that less novel methods may also be implemented to display or otherwise indicate the target devices that are to be remapped to logical addresses. For instance, a method invented almost a decade ago by the appiicant for use in the applicant's ADDICT OAU commissioning 10 tool and used for the purpose of remapping random long addresses to short addresses that are effectively random does so by means of the applicant's algorithm that isolates a single long address by checking half of a set of-all possible Song addresses for a single long address and if more than one long address is found the algorithm will halve the set of possible long addresses into a set one quarter the size of the original set and again seek a single long address and if more than one long address, is IS again found the algorithm: will halve again this quarter set of possible long addresses into a set one eighth the sire of the original set and will continue this process until a single long address is found, the first of which wii! be assigned to short address zero, followed by the nest single long address being remapped to short address 1 and so on. An obvious adaptation to this method would therefore be to employ it as a method of remapping random short addresses to logical short addresses by similarly 20 halving the set of random short addresses and visually or otherwise indicating whether or not the target device is in the selected set of random short addresses and if It is in the selected set, by halving that set again to visually indicate whether it is in the halved set or not and so on until the single target short address is the only address in any reduced set, if any set did not include the target then the method would be capable jof simply and automatically deducing that the target is in the excluded set 25 and would then Indicate the previously excluded set being the set to which the target belongs before halving that set and soon Until the single target short address is the only address in the reduced set.

It is preferable, but not essential, for the outer loop to be carried out algorithmically in the method depicted in Figure 4. A one or more bit signal is sent from a Logic Computing Device to a DALI Control BO Device to initiate the process. Alternatively, the user Inputs a command directly via an interface on the DAO Control Device, The outer loop will set the device with the first random short address to go to its DALI Maximum (brightest intensity for two hundred and fifty milliseconds before sending a DALI Minimum (lowest.intensity) command to that same device to go to its lowest dimmed intensity. The OAU Control Device will then increment to the next, address at which time it will determine whether SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 8 any command has been received from a suitable logic Computing Device to initiate the inner loop, if such a command is received; the inner loop, described in more detail below., will begin to run, if no such command has been received, the outer loop will continue. S Another preferred embodiment of the invention might allow for Logic Computing Devices with Inbuilt accelerometers and/or gyroscopes, such as smartphones,, tablets and wearable electronics (e.g. Android Wear products, such as a 'smart' watch or other wearable computer or electronic device), to communicate with a DALI Control Device provided a threshold acceleration is created by the user moving such Logic Computing Device. An example of how this could work in the context of addressing 10 DAU devices is depicted id Figure 6. An Android Wear device 600 Is worn on 3 user's wrist. The osar makes a movement of their wrist 602. which is calculated by an accelerometer in the Android Wear device. The software Installed on the Android Wear device 60S recognises this movement and reads this as a trigger to send data over a wireless network 604 which forms the intranet 612 to the DAU Control Device 608 and onto a DALI Device 60S via a DAU cable 610, The commands sent to the DAU 15 Control Device might be, for example, a command to start the inner loop (described below), or the outer loop, or to confirm that the target device has beers visually indicated during an outer-or inner loop, but not necessarily limited to these functions. It is recognised that the Logic Computing Devices need hot necessarily take advantage of any accelerometer or gyroscope present within the device, and could be triggered to send commands over an intranet such as a wireless network in less novel 20 ways, such as by a button press from a physical and/or virtual button, A virtual button might be created as part of a GUI on a Logic Computing Device,

Another preferred embodiment of the Invention may be an algorithmically implemented method of displaying what is referred to herein as the inner bop'. The 'inner loop' may be a process of flashing 25 DAU devices at a slower pace than they would be flashed during the outer loop, with such reduction in pace aiding the user's confirmation of the device to be remapped as having been flashed. The inner loop could possibly be initiated and sustained in the way depicted by Figure 7, As depicted In Figure 8 a user 714 wiii .observe the DAU devices 700 to 712 flashing as part of the outer loop. The user, typically known as a 'systems Integrator' waits until the target device 712, typically a light that they wish to 30 address, has flashed, at which point they will press a button generated on the GUI on the Logie Computing Device 718, This button press may cause the two prior devices 708 and 710 that were flashed as past of the outer loop to be included in the inner loop, in addition to the device 712 that was flashed at the time the user pressed the button and the device 700 that would have been flashed next. Ideally, this button press will cause the Logic Computing Device to transmit s signal to the DAU SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 9

Control Device that the DAL! Control Device can recognise es an instruction to sequence through hashing the two devices that were hashed prior to the button press, with such sequence preferably but not necessarily at a slower pace than the outer loop, and any device that was visually or otherwise indicated at the time the button was pressed. The systems integrator may wait until the device that they wish to address has flashed, at which point they may press again the same button previously referred to. it is preferable, but not essential, for the Inner loop to be carried out algorithmically In the method depicted in Figure 8, The Inner loop begins when ft is initiated by a button press during the execution of the outer loop, The algorithm will then determine if the difference between the address that was flashed and the loop site {which is three by default as addresses start at zero) is less than the lowest available address to be assigned, if this is the case, then the algorithm may calculate the starting address of the inner loop with the following function: 1 + Maximum Upper Address 4- Current Address — Lowest Available .Address -Loop count

For example, if there are fifty-eight addresses, and five addresses have already been assigned, and address six was flashed when the inner ioop was initiated, the algorithm will calculate X + $8 4- 6 -3 ~ 57» Therefore, the inner loop will start at address fifty-seven, and end at address seven. Starting at address fifty-seven, the address will be sent a DALI Maximum command. There wilt be a five hundred millisecond delay before that same address is sent a DALI Minimum command, if the user does not send any confirmation signal, the loop counter will be decremented by one to reflect that one address has been flashed and the user has not responded. This process will repeat until the loop counter reaches zero. When this occurs, the loop counter is reset to four, the process Is ended and the inner loop shall restart.

Another embodiment of the preferred invention may be an algorithmically implemented method of displaying the inner loop where there are four or fewer devices remaining to be addressed on a single SAL! line. Where there are four or fewer addresses remaining to be assigned to a logical short address, the Inner bop would ideally run without returning to the outer loop after a logical short address has been assigned. For example, if there are five devices to be addressed on a DALI line, and one of those five devices is addressed, instead of returning to the outer ioop, the invention will immediately terminate the outer loop and commence running the inner loop. This feature is advantageous as it avoids unnecessarily returning to the outer loop when the inner loop will always contain four devices. SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 10

St is recognised, however, that a different number of devices could be set as the number of devices to be displayed as part of the inner loop. For instance, five or six devices may be used instead, four devices has proven to be the most advantageous number of devices to use, although it is obvious more or less could be used as part of the inner loop.. An option to select the number of devices to use as part of the inner loop forms the next embodiment discussed below. in another embodiment there may be an algorithmically Implemented method of specifying how many devices are to be displayed as part of the inner loop. The default number of devices to be displayed is four, however more or fewer devices could be chosen by the user to be displayed as part of the inner loop. This is advantageous as it is recognised that reaction times differ among individuals, A person with slower than average reaction times may find it difficult to react: fast enough to initiate the inner loop, thus requiring this further embodiment This embodiment could be implemented by providing in the GUI that is Installed on a Logic Computing Device an option to specify the number of devices to be displayed ss part of the inner loop. Then, when the inner loop commences as outlined above, the number of devices displayed as part of the inner ioop will be the number of devices specified by the user.

In another preferred embodiment of the invention there may be m algorithmically implemented method of indicating to the user which target device has been selected to be addressed, but without actually remapping the address, so as to allow the user to verify that the device that is selected is definitely the device that they wish to address. This embodiment of the invention may provide such a visual Indicator by flashing the currently selected device at a certain rate, whilst leaving all other devices on the line in a dimmed state, so as to accentuate the visibility of the flashing device. in another preferred embodiment of the invention there may be an algorithmically Implemented method of providing visual feedback to a user to indicate that all devices on the line have been successfully remapped with a new short address. After the user has confirmed that the selected device is Indeed the device to be remapped, and that device is the last device on the line to be assigned a logical short address since initiating the program, all devices could be flashed 2 times over 2 seconds to indicate that all devices have been Instructed to remap their short address as intended, in another embodiment, the invention- may provide an algorithmically Implemented method for determining whether a new DALI device has been added to the line, The best known method for doing so is to include in the GUI, or similar commissioning topi, an option to scan the DALI line for new devices. When this option is selected, the Logic Computing Device may instruct the DAU Control Device to calculate the difference between the current number of found devices and the number of SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 11 devices that were found the previous time that the devices were counted by the DAU Control Device. For example, 9 project currently has fifty sight devices installed onto a single DALI line, and they have all previously been assigned a logical short, address, and three more DAU devices are subsequently installed. Assuming that the invention had previously been used to count all fifty eight devices, the 5 DAU Control Device would recognise that there are now sixty one devices on the line, whereas previously, there were fifty eight, concluding that three new devices had been added at some point This method is advantageous as It allows for the set of devices to be remapped to be limited to only those devices that have not already been assigned a logical short address, therefore saving time. in another embodiment, the Invention may provide an algorithmically implemented method for 10 random addressing the newly installed devices. The best known method for achieving this result is to allocate within the firmware a buffer of memory to be used to allocate the state of the DAU devices. In this context, the “state'’ of a DAU device is dictated by whether or not that device has been addressed using the method disclosed in this patent. If 3 DAU device is addressed using this method, It will be assigned a one byte value to indicate that it has either had a logical short address assigned 15 to It, or it has had no logicaS short address assigned to it, by means of standard DAU commands as set out in the DAU Standard. When the DAU Control Device returns to the Logic Computing Device the total number of newly found devices, it will then reference the buffer of values that indicate the stale of the device. If the state of the device as indicated by the memory buffer indicates that it is a device that is yet to be assigned a short: address, then the devices will be random addressed by means of a 20 DAU r andomise command that will cause the new device to gener ate and store a random long address followed by commands to set the device to an unused short address that is effectively random. In the case that only one device is added to a previously addressed and remapped line, the user may be given the ability to 'set1 the short address of the new device without first randomly addressing the device. in another embodiment, the invention may include an algorithmically implemented method of 25 allowing the user to specify the number of devices that are connected to the DAU line. This could be achieved by providing the user a facility in the GUI to enter a number specifying the total number of devices that should be on the line or by providing this facility on a DAU line controller and/or power supply. This number could than he transmitted or entered into to a DAU Control Device. When the DAU Control Device receives this number, it could, at some later point in time, count the number of 30 DAU devices on the line by using the DAU 'query actual status' command. This command returns a one byte value indicating that the address contains a device. The DAU Control Device could then communicate with the user whether or not the correct number of devices were found which information may also communicate the difference between the number of devices specified by the user and the number of devices that were found by the DAU Control Device, with such communication SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 12 achieved by means of intercommunication to the user's Logic Computing Device or by a display on the Sighting controller such as a display screen, this is advantageous as it provides for a quick method of diagnosing device connectivity issues before the process of remapping addresses to logical short addresses is to begin and,, in an example in w hich the number of devices found was less than the target number of devices installed, could offer the user the choice to have the OAU Control Device or the user's Logic Computing Device via the DALI Control Device look again for any unaddressed devices and If new devices are discovered to then assign them with an individual unused short address for each newly discovered device, which would then be ready for remapping.

In another embodiment, the invention may include an algorithm implemented upon a Logic Computing Device that would allow the user to specify a range of logical short addresses that ere to be used in the remapping of random short addresses. As previously mentioned, by default, the next lowest remaining logical short address will be the next to be assigned, for example, if a user had assigned two short addresses to lights, the next short address to be assigned would be short address two (because short addresses zero and one preceded It), in this embodiment, however, the user could specify the next addresses to be specified are to be addresses ten to twenty five. This Is· advantageous as it would allow devices to be addressed even In.the event that a number of devices are not yet installed on the DALI line, or the user prefers to remap addresses by specific sub-sets, for example, there are sixty four devices that must he remapped to logical addresses for a project. Ail devices are installed, except the devices that are supposed to be addresses eleven through to twenty inclusive. This embodiment of the invention would allow the user, after having remapped a device to address ten, to specify that a new range of devices are to be addressed next, in this case, the new range would be addresses twenty-one to sixty-four. Addresses eleven to twenty inclusive have been slopped because they are not installed yet, and couid be addressed at a later stage.

In another embodiment, the invention may include an algorithmically implemented method of returning to the previous stage in the addressing process by making a gesture with a Logic Computing Device, fjor example, if the user has accidentally selected a Sight to be addressed, the user couid perform an action, such as a swift movement of the Logic Computing Device across a horizontal axis, thus returning to the previous stage of the addressing process, ideally, in this scenario, the previous stage in the addressing process would be the inner loop. One such way of implementing this feature is to implement an algorithm onto the Logic Computing Device that is equipped with an accelerometer. Such an algorithm may contain a function for setting a threshold acceleration and a function for measuring such acceleration in order to determine whether said threshold has been satisfied. In the event that the threshold acceleration is satisfied, the Logic Computing Device may then instruct the DAU Control Device to return to a previous function used as part of the addressing SUBSTITUTE SHEET (RULE 26) WO 2016/023061 PCT/AU2014/050178 13 process. Of course the function of a swift movement of the Logic Computing Device could he different for different directions of movement, requiring the additional measurement of direction to be satisfied.

The presently disclosed embodiments are therefore considered in ail respects to be illustrative end not: restrictive. The scope of the invention is indicated by the appended claims, rather than the foregoing description, and all changes that come within the meaning and range of equivalents thereof are intended to be embraced therein. SUBSTITUTE SHEET (RULE 26)

Claims (13)

  1. AMENDED CLAIMS received by the International Bureau on 18 November 2014 (18.11.2014) What is claimed is:
    1. An algorithmically implemented method of visually displaying which DALI devices remain to be remapped from a random short address to a logical short address, comprising the steps of: a. Determining whether the algorithm has been previously executed in the addressing session; b. If the algorithm has previously been run in the addressing session, determining whether the user is causing any DALI addressing commands to be sent; c. If the user is not causing any DALI addressing commands to be sent, initiating the method contained below In steps d - f of this claim; d. Determining which devices have been assigned a logical short address since an addressing session had been started; e. Excluding these devices from the set of devices to be displayed; f. Flashing all such devices that have not been assigned a logical short address In the sequential order of their random short address;
  2. 2. An algorithmically implemented method of displaying a smaller set of devices to be addressed, where such devices are contained as part of the larger set of devices mentioned in claim one, comprising the steps of: a. Execution of the method subject of claim one; b. Sending a command from a Logic Computing Device to a DALI Control Device; c. Receiving such command into a DALI Control Device; d. At some point in time subsequent to the receipt of such a command, flashing the two devices that were flashed as part of the method in claim one, in addition to any one single device that was in the process of being flashed when the previously mentioned command was sent, in addition to any one device that would be flashed next;
  3. 3. An algorithm for implementing the method subject of the second claim, comprising the steps of: a. Calculating the difference between the size of the inner loop and the address value of the device that was flashed when the inner loop was Initiated; b. Determining whether the result of the first step is a lower Integer value than the Integer value of the lowest available remaining DALI address; c. If the result of the second step is a lower integer value than the integer value of the lowest available remaining DALI address: utilising a circular buffer to set the first address of the inner loop, then moving to step d; d. Sending a DALI Maximum command to the first address in the inner loop; e. Delaying for five hundred milliseconds; f. Sending a DALI Minimum command to the first address in the inner loop; g. Repeat steps 4 - 6 of this claim until all devices in the inner loop have been flashed; h. Repeat steps 4 - 7 of this claim until a confirmation signal is sent;
  4. 4. An algorithmically implemented method of displaying a different number of devices to that which is specified in claim two, comprising the steps of: a. Creating within the GUI of a Logic Computing Device an option to specify the number of devices to be displayed; b Executing the method subject of claim three, with the number of devices being displayed as part of the last step now being the number of devices specified by the user;
  5. 5. An algorithmically implemented method of displaying a different number of devices to that which is specified in claim two, comprising the steps of: a. Creating within the display screen of a DALI Control Device an option to specify the number of devices to be displayed; b. Executing the method subject of claim two, with the number of devices being displayed as part of the last step now being the number of devices specified by the user;
  6. 6. An algorithmically Implemented method of displaying a device that has been selected by a user to be addressed, comprising the steps of: a. Execution of the method subject of claim two; b. Sending a command from a Logic Computing Device to a DALI Control Device, c. Receiving such command into a DALI Control Device; d. At some point in time subsequent to the receipt of such a command, continuously flashing the device that was flashed as part of the method in claim two, until such time as a DALI addressing command is received;
  7. 7. An algorithmically Implemented method of providing sensory feedback that a device has been successfully addressed, comprising the steps of: a. Execution of the method subject of claim six; b. Sending of a DALI address command to assign a short address to the device that is flashing; c. When such DALI addressing command is sent and the device is remapped from its previous short address to the new short address, flashing the device multiple times in quick succession;
  8. 8. An algorithmically implemented method of addressing new DALI devices, comprising the steps of: a. Allocating a one or more bit value to an address whenever such address is assigned a logical short address as an indication that the address has received a logical short address; b. Counting the new devices as per claim nine; c. Using the one or more bit value mentioned above as an indicator as to which devices have not been assigned a logical short address; d. Addressing any such device that does not have the one or more bit indicator value assigned;
  9. 9. An algorithmically implemented method that allows a user to specify a range of logical short addresses to be assigned, comprising the steps of: a. Providing in a GUI on a Logic Computing Device, or in a GUI or a display screen with accompanying keypad or similar switches on a DALI control device, an option to specify the lowest logical short address value to be assigned; b. Providing in a GUI on a Logic Computing Device, or in a GUI or a display screen with accompanying keypad or similar switches on a DALI control device, an option to specify the highest logical short address value to be assigned, c. Assigning a device selected to be addressed, using the methods contained in these claims, one address from the specified range of addresses to be assigned, until such time as each address in the specified range has been assigned once individually to those devices;
  10. 10. An algorithmically Implemented method of executing the method of claim two, comprising the steps of: a. Determining whether there are four or fewer devices to be assigned a logical short address; b. Executing the method of claim two where there are four or fewer devices remaining to be assigned a logical short address;
  11. 11. An algorithmically implemented method of updating the devices to be displayed as part of claim three, comprising the steps of: a. Determining whether there are four or fewer devices to be assigned a logical short address; b. Flashing only the devices that remain to be assigned a logical short address, provided there are four or fewer devices to be assigned a logical short address;
  12. 12. An algorithmically implemented method of returning to the previous stage of the addressing process, comprising the steps of: a. Executing the method of either claim one, two, or six; b. Within an algorithm implemented in any way onto a Logic Computing Device equipped with an accelerometer, setting a threshold horizontal acceleration; c. Within a Logic Computing Device equipped with an accelerometer, measuring a change in horizontal acceleration of the device; d. Calculating whether the horizontal acceleration of the device meets the threshold; e. In the event the threshold is satisfied, causing the Logic Computing Device to instruct the DALI Control Device to return to the previous function.
  13. 13. An algorithmically implemented method of addressing a DALI device, comprising the steps of: a. Executing the method of claim six; b. Within an algorithm implemented in any way onto a Logic Computing Device equipped with an accelerometer, setting a threshold vertical acceleration; c. Within a Logic Computing Device equipped with an accelerometer, measuring a change in vertical acceleration of the device; d. Calculating whether the vertical acceleration of the device meets the threshold; e. In the event the threshold is satisfied, causing the Logic Computing Device to instruct the DALI Control Device to assign an address to the DALI device
AU2014403782A 2014-08-11 2014-08-11 DALI device addressing method and software Expired - Fee Related AU2014403782B2 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010107642A1 (en) * 2009-03-20 2010-09-23 Lutron Electronics Co., Inc. Method of confirming that a control device complies with a predefined protocol standard
EP2603061A1 (en) * 2011-12-06 2013-06-12 Panasonic Corporation Illumination System
EP2713681A1 (en) * 2012-09-28 2014-04-02 Panasonic Corporation Lighting system
US20140142731A1 (en) * 2011-04-20 2014-05-22 Tridonic Gmbh & Co. Kg Addressing method for a lighting means

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010107642A1 (en) * 2009-03-20 2010-09-23 Lutron Electronics Co., Inc. Method of confirming that a control device complies with a predefined protocol standard
US20140142731A1 (en) * 2011-04-20 2014-05-22 Tridonic Gmbh & Co. Kg Addressing method for a lighting means
EP2603061A1 (en) * 2011-12-06 2013-06-12 Panasonic Corporation Illumination System
EP2713681A1 (en) * 2012-09-28 2014-04-02 Panasonic Corporation Lighting system

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