AU2002334569A1 - An integrated circuit which accepts instructions in multiple protocols, and a processing system including the integrated circuit - Google Patents

An integrated circuit which accepts instructions in multiple protocols, and a processing system including the integrated circuit

Info

Publication number
AU2002334569A1
AU2002334569A1 AU2002334569A AU2002334569A AU2002334569A1 AU 2002334569 A1 AU2002334569 A1 AU 2002334569A1 AU 2002334569 A AU2002334569 A AU 2002334569A AU 2002334569 A AU2002334569 A AU 2002334569A AU 2002334569 A1 AU2002334569 A1 AU 2002334569A1
Authority
AU
Australia
Prior art keywords
integrated circuit
processing system
system including
multiple protocols
accepts instructions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002334569A
Inventor
Pramod Kumar Pandey
Vivek Sabnis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of AU2002334569A1 publication Critical patent/AU2002334569A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
AU2002334569A 2002-09-06 2002-09-06 An integrated circuit which accepts instructions in multiple protocols, and a processing system including the integrated circuit Abandoned AU2002334569A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SG2002/000208 WO2004023318A1 (en) 2002-09-06 2002-09-06 An integrated circuit which accepts instructions in multiple protocols, and a processing system including the integrated circuit

Publications (1)

Publication Number Publication Date
AU2002334569A1 true AU2002334569A1 (en) 2004-03-29

Family

ID=31974289

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002334569A Abandoned AU2002334569A1 (en) 2002-09-06 2002-09-06 An integrated circuit which accepts instructions in multiple protocols, and a processing system including the integrated circuit

Country Status (2)

Country Link
AU (1) AU2002334569A1 (en)
WO (1) WO2004023318A1 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020019891A1 (en) * 1999-12-30 2002-02-14 James Morrow Generic device controller unit and method
US7895342B2 (en) * 2000-03-02 2011-02-22 Dearborn Group, Inc. Multi-protocol adapter for in-vehicle and industrial communications networks

Also Published As

Publication number Publication date
WO2004023318A1 (en) 2004-03-18

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase