AT309548T - System testing device on a chip with reprogrammierbarem, debugger, and bus monitoring - Google Patents

System testing device on a chip with reprogrammierbarem, debugger, and bus monitoring

Info

Publication number
AT309548T
AT309548T AT00935874T AT00935874T AT309548T AT 309548 T AT309548 T AT 309548T AT 00935874 T AT00935874 T AT 00935874T AT 00935874 T AT00935874 T AT 00935874T AT 309548 T AT309548 T AT 309548T
Authority
AT
Austria
Prior art keywords
reprogrammierbarem
debugger
chip
testing device
system testing
Prior art date
Application number
AT00935874T
Other languages
German (de)
Inventor
Keith Rieken
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US13314099P priority Critical
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Priority to PCT/US2000/012472 priority patent/WO2000068698A1/en
Publication of AT309548T publication Critical patent/AT309548T/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3187Built-in tests
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31705Debugging aspects, e.g. using test circuits for debugging, using dedicated debugging test circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555Control logic
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W24/00Supervisory, monitoring or testing arrangements
AT00935874T 1999-05-07 2000-05-05 System testing device on a chip with reprogrammierbarem, debugger, and bus monitoring AT309548T (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US13314099P true 1999-05-07 1999-05-07
PCT/US2000/012472 WO2000068698A1 (en) 1999-05-07 2000-05-05 Apparatus and method for implementing a wireless system-on-a-chip with a reprogrammable tester, debugger, and bus monitor

Publications (1)

Publication Number Publication Date
AT309548T true AT309548T (en) 2005-11-15

Family

ID=22457196

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00935874T AT309548T (en) 1999-05-07 2000-05-05 System testing device on a chip with reprogrammierbarem, debugger, and bus monitoring

Country Status (8)

Country Link
US (1) US6665817B1 (en)
EP (1) EP1183544B1 (en)
JP (1) JP2002544577A (en)
AT (1) AT309548T (en)
AU (1) AU5127000A (en)
CA (1) CA2372347A1 (en)
DE (1) DE60023882T2 (en)
WO (1) WO2000068698A1 (en)

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US7134118B1 (en) * 2000-10-26 2006-11-07 Siemens Energy & Automation, Inc. Re-programmable flash memory micro controller as programmable logic controller
US7366876B1 (en) * 2000-10-31 2008-04-29 Analog Devices, Inc. Efficient emulation instruction dispatch based on instruction width
US6985980B1 (en) * 2000-11-03 2006-01-10 Xilinx, Inc. Diagnostic scheme for programmable logic in a system on a chip
US6948098B2 (en) * 2001-03-30 2005-09-20 Cirrus Logic, Inc. Circuits and methods for debugging an embedded processor and systems using the same
US6760865B2 (en) * 2001-05-16 2004-07-06 Freescale Semiconductor, Inc. Multiple level built-in self-test controller and method therefor
US7246277B2 (en) * 2001-06-20 2007-07-17 Jeffrey Lukanc Test bus architecture for embedded RAM and method of operating same
DE10139660B4 (en) * 2001-08-11 2007-07-05 Infineon Technologies Ag Program-controlled unit with debug resources
EP1304854A1 (en) * 2001-10-19 2003-04-23 Texas Instruments France Method and system for providing multi-channel functionality with a telecommunication device comprising a single channel
GB0215065D0 (en) * 2002-06-28 2002-08-07 Alpha Thames Ltd A method and system for controlling the operation of devices in a hydrocarbon production system
US7184915B2 (en) * 2003-03-20 2007-02-27 Qualcomm, Incorporated Tiered built-in self-test (BIST) architecture for testing distributed memory modules
US7392442B2 (en) 2003-03-20 2008-06-24 Qualcomm Incorporated Built-in self-test (BIST) architecture having distributed interpretation and generalized command protocol
GB2407730A (en) * 2003-10-30 2005-05-04 Agilent Technologies Inc Programmable network monitoring element
US7155651B2 (en) * 2004-04-22 2006-12-26 Logicvision, Inc. Clock controller for at-speed testing of scan circuits
US7428663B2 (en) 2004-06-01 2008-09-23 Alcatel Lucent Electronic device diagnostic methods and systems
US7137086B2 (en) * 2004-07-06 2006-11-14 Dafca, Inc. Assertion checking using two or more cores
EP1624464A1 (en) * 2004-08-05 2006-02-08 STMicroelectronics S.r.l. Built-in self diagnosis device for a random access memory and method of diagnosing a random access memory
US7428678B1 (en) * 2004-09-22 2008-09-23 Cypress Semiconductor Corporation Scan testing of integrated circuits with high-speed serial interface
US8621304B2 (en) * 2004-10-07 2013-12-31 Hewlett-Packard Development Company, L.P. Built-in self-test system and method for an integrated circuit
US7193435B2 (en) 2005-02-04 2007-03-20 Itt Manufacturing Enterprises, Inc. Programmable application specific integrated circuit for communication and other applications
US7502965B2 (en) * 2005-02-07 2009-03-10 Broadcom Corporation Computer chip set having on board wireless interfaces to support test operations
US20070032999A1 (en) * 2005-08-05 2007-02-08 Lucent Technologies Inc. System and method for emulating hardware failures and method of testing system software incorporating the same
GB2430768A (en) * 2005-09-28 2007-04-04 Univ Kent Canterbury Reconfigurable integrated circuits
US7568136B2 (en) * 2005-11-08 2009-07-28 M2000 Sa. Reconfigurable system and method with corruption detection and recovery
US7490280B2 (en) 2006-02-28 2009-02-10 International Business Machines Corporation Microcontroller for logic built-in self test (LBIST)
US7519884B2 (en) * 2006-06-16 2009-04-14 Texas Instruments Incorporated TAM controller for plural test access mechanisms
US20090112548A1 (en) * 2007-10-30 2009-04-30 Conner George W A method for testing in a reconfigurable tester
US20090113245A1 (en) 2007-10-30 2009-04-30 Teradyne, Inc. Protocol aware digital channel apparatus
US8677306B1 (en) * 2012-10-11 2014-03-18 Easic Corporation Microcontroller controlled or direct mode controlled network-fabric on a structured ASIC

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US5701417A (en) 1991-03-27 1997-12-23 Microstar Laboratories Method and apparatus for providing initial instructions through a communications interface in a multiple computer system
JPH04317222A (en) 1991-04-17 1992-11-09 Hitachi Ltd Signal processor
US5425036A (en) * 1992-09-18 1995-06-13 Quickturn Design Systems, Inc. Method and apparatus for debugging reconfigurable emulation systems
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Also Published As

Publication number Publication date
WO2000068698A1 (en) 2000-11-16
JP2002544577A (en) 2002-12-24
EP1183544A1 (en) 2002-03-06
AU5127000A (en) 2000-11-21
WO2000068698A9 (en) 2002-06-06
DE60023882D1 (en) 2005-12-15
US6665817B1 (en) 2003-12-16
EP1183544A4 (en) 2005-01-19
CA2372347A1 (en) 2000-11-16
EP1183544B1 (en) 2005-11-09
DE60023882T2 (en) 2006-07-20

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties