AT138212T - INTEGRATED CACHE STORAGE UNIT - Google Patents

INTEGRATED CACHE STORAGE UNIT

Info

Publication number
AT138212T
AT138212T AT89300435T AT89300435T AT138212T AT 138212 T AT138212 T AT 138212T AT 89300435 T AT89300435 T AT 89300435T AT 89300435 T AT89300435 T AT 89300435T AT 138212 T AT138212 T AT 138212T
Authority
AT
Austria
Prior art keywords
storage unit
cache storage
integrated cache
integrated
unit
Prior art date
Application number
AT89300435T
Other languages
English (en)
Inventor
Gigy Baror
William Michael Johnson
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US14600188A priority Critical
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AT138212T publication Critical patent/AT138212T/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0848Partitioned cache, e.g. separate instruction and operand caches
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/601Reconfiguration of cache memory
AT89300435T 1988-01-20 1989-01-18 INTEGRATED CACHE STORAGE UNIT AT138212T (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14600188A true 1988-01-20 1988-01-20

Publications (1)

Publication Number Publication Date
AT138212T true AT138212T (de) 1996-06-15

Family

ID=22515487

Family Applications (1)

Application Number Title Priority Date Filing Date
AT89300435T AT138212T (de) 1988-01-20 1989-01-18 INTEGRATED CACHE STORAGE UNIT

Country Status (4)

Country Link
EP (1) EP0325422B1 (de)
JP (1) JP3218316B2 (de)
AT (1) AT138212T (de)
DE (1) DE68926466T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0325421B1 (de) * 1988-01-20 1994-08-10 Advanced Micro Devices, Inc. Organisation eines integrierten Cachespeichers zur flexiblen Anwendung zur Unterstützung von Multiprozessor-Operationen
US5136691A (en) * 1988-01-20 1992-08-04 Advanced Micro Devices, Inc. Methods and apparatus for caching interlock variables in an integrated cache memory
US5025366A (en) * 1988-01-20 1991-06-18 Advanced Micro Devices, Inc. Organization of an integrated cache unit for flexible usage in cache system design
JPH01233537A (en) * 1988-03-15 1989-09-19 Toshiba Corp Information processor provided with cache memory
JPH0740248B2 (ja) * 1988-08-16 1995-05-01 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン キャッシュ制御装置
US5043886A (en) * 1988-09-16 1991-08-27 Digital Equipment Corporation Load/store with write-intent for write-back caches
JPH077355B2 (ja) * 1988-12-27 1995-01-30 株式会社東芝 情報処理装置
JPH0680499B2 (ja) * 1989-01-13 1994-10-12 インターナショナル・ビジネス・マシーンズ・コーポレーション マルチプロセッサ・システムのキャッシュ制御システムおよび方法
JPH077357B2 (ja) * 1989-10-19 1995-01-30 工業技術院長 バッファ制御方式
JPH1153260A (ja) * 1997-08-06 1999-02-26 Nec Corp キャッシュメモリー内蔵半導体装置
US6378044B1 (en) * 1999-09-22 2002-04-23 Vlsi Technology, Inc. Method and system for cache replacement among configurable cache sets
US8527713B2 (en) * 2006-01-31 2013-09-03 Qualcomm Incorporated Cache locking without interference from normal allocations
US20130262780A1 (en) * 2012-03-30 2013-10-03 Srilatha Manne Apparatus and Method for Fast Cache Shutdown
DE102020003326A1 (de) 2020-06-03 2020-07-30 Daimler Ag Verfahren zum Maskieren von Kraftfahrzeugdaten eines Kraftfahrzeugs, sowie elektronische Recheneinrichtung

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3898624A (en) * 1973-06-14 1975-08-05 Amdahl Corp Data processing system with variable prefetch and replacement algorithms
FR2344093B1 (de) * 1976-03-10 1978-12-08 Cii Honeywell Bull
US4357656A (en) * 1977-12-09 1982-11-02 Digital Equipment Corporation Method and apparatus for disabling and diagnosing cache memory storage locations
US4315312A (en) * 1979-12-19 1982-02-09 Ncr Corporation Cache memory having a variable data block size
DE3138972A1 (de) * 1981-09-30 1983-04-14 Siemens Ag Onchip mikroprozessorchachespeichersystem und verfahren zu seinem betrieb
US4484267A (en) * 1981-12-30 1984-11-20 International Business Machines Corporation Cache sharing control in a multiprocessor
US5136691A (en) * 1988-01-20 1992-08-04 Advanced Micro Devices, Inc. Methods and apparatus for caching interlock variables in an integrated cache memory
US5025366A (en) * 1988-01-20 1991-06-18 Advanced Micro Devices, Inc. Organization of an integrated cache unit for flexible usage in cache system design
EP0325421B1 (de) * 1988-01-20 1994-08-10 Advanced Micro Devices, Inc. Organisation eines integrierten Cachespeichers zur flexiblen Anwendung zur Unterstützung von Multiprozessor-Operationen

Also Published As

Publication number Publication date
JP3218316B2 (ja) 2001-10-15
DE68926466T2 (de) 1996-10-17
EP0325422B1 (de) 1996-05-15
JPH01237835A (en) 1989-09-22
EP0325422A3 (de) 1991-01-09
EP0325422A2 (de) 1989-07-26
DE68926466D1 (de) 1996-06-20

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties